Processing System, Related Integrated Circuit, Device and Method

    公开(公告)号:US20210294534A1

    公开(公告)日:2021-09-23

    申请号:US17341054

    申请日:2021-06-07

    Abstract: A processing system includes a plurality of configuration data clients, each associated with a respective address and including a respective register, and where a respective configuration data client is configured to receive a respective first configuration data and to store the respective first configuration data in the respective register; a hardware block coupled to at least one of the configuration data clients and configured to change operation as a function of the respective first configuration data stored in the respective registers; a non-volatile memory including second configuration data, where the second configuration data are stored as data packets including the respective first configuration data and an attribute field identifying the respective address of one of the configuration data clients; and a hardware configuration circuit configured to sequentially read the data packets from the non-volatile memory and to transmit the respective first configuration data to the respective configuration data client.

    Processing system, related integrated circuit and method for generating interrupt signals based on memory address

    公开(公告)号:US11068331B2

    公开(公告)日:2021-07-20

    申请号:US16289425

    申请日:2019-02-28

    Inventor: Roberto Colombo

    Abstract: A processing system includes a processing unit configured to be connected to a memory with error detection and/or correction. The processing unit generates at least one read request for reading data from the memory, the read request including an address signal identifying an address of a given memory area in the memory. The processing system includes an error handling circuit connected to the memory for receiving an error signal containing an error code indicating whether the data read from the memory contains errors. The error handling circuit includes a hardware circuit configured to set a first error signal to the error code of the error signal when the address indicated by the address signal belongs to a first address range and to set a second error signal to the error code of the error signal when the address indicated by the address signal belongs to a second address range.

    Processing system, related integrated circuit, device and method

    公开(公告)号:US10740041B2

    公开(公告)日:2020-08-11

    申请号:US15991208

    申请日:2018-05-29

    Inventor: Roberto Colombo

    Abstract: A processing system includes a processing unit and a hardware block configured to change operation as a function of life cycle data. A one-time programmable memory includes original life cycle data. A hardware configuration module is configured to read the original life cycle data from the one-time programmable memory and provide the original life cycle data to the hardware block. The hardware configuration module includes a register providing the life cycle data used to change operation of the hardware block. The hardware configuration module is configured to store the original life cycle data in the register and receive a command from the processing unit. The command includes a write request for storing new life cycle data in the register.

    NFC apparatus capable to perform a contactless tag reading function

    公开(公告)号:US09793960B2

    公开(公告)日:2017-10-17

    申请号:US13944169

    申请日:2013-07-17

    Abstract: An NFC device may include a first and second controller interfaces, a first communication channel coupled to the first controller interface, and a second communication channel connected to the second controller interface. A secure element may include a secure element interface connected to the first communication channel and encryption/decryption circuitry configured to encrypt data to be sent on the first communication channel for being framed into the encrypted frames and to decrypt encrypted data extracted from the encrypted frames and received from the first communication channel. The secure element may also include management circuitry configured to control the encryption/decryption circuitry for managing the encrypted communication with the NFC controller. A device host may include a host device interface coupled to the second controller interface and control means or circuitry configured to control the management circuitry through non-encrypted commands exchanged on the first and second communication channels.

    Active battery balancing circuit and method of balancing an electric charge in a plurality of cells of a battery
    117.
    发明授权
    Active battery balancing circuit and method of balancing an electric charge in a plurality of cells of a battery 有权
    有源电池平衡电路和平衡电池多个电池中的电荷的方法

    公开(公告)号:US09496724B2

    公开(公告)日:2016-11-15

    申请号:US13849374

    申请日:2013-03-22

    Inventor: Reiner Schwartz

    Abstract: A method and an active battery balancing circuit for balancing an electric charge in a plurality of cells of a battery that are electrically connected in series is disclosed. A first subset of the cells of the battery is electrically connected to an inductance for providing a current flow from the first subset through the inductance. The first subset of the cells is disconnected from the inductance, and a current is allowed to flow from the inductance into a second subset of the cells of the battery. At least one of the first and the second subset of the cells of the battery comprises two or more cells.

    Abstract translation: 公开了一种用于平衡串联电连接的电池的多个单电池中的电荷的方法和有源电池平衡电路。 电池的单元的第一子集电连接到电感,以提供来自第一子集的电流流过电感。 电池的第一子集与电感断开,并且允许电流从电感流入电池单元的第二子集。 电池单元的第一和第二子集中的至少一个包括两个或更多个单元。

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