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公开(公告)号：US11889103B2
公开(公告)日：2024-01-30
申请号：US18056136
申请日：2022-11-16
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N11/02 , H04N19/52 , H04N19/119 , H04N19/176
CPC classification number: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US11889076B2
公开(公告)日：2024-01-30
申请号：US17727201
申请日：2022-04-22
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/119 , H04N19/176
CPC classification number: H04N19/119 , H04N19/176
Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
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公开(公告)号：US11856217B2
公开(公告)日：2023-12-26
申请号：US18064774
申请日：2022-12-12
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
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公开(公告)号：US11812027B2
公开(公告)日：2023-11-07
申请号：US17473911
申请日：2021-09-13
Inventor： Ru Ling Liao , Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/115 , H04N19/137 , H04N19/159 , H04N19/176 , H04N19/105 , H04N19/132 , H04N19/119
CPC classification number: H04N19/137 , H04N19/105 , H04N19/119 , H04N19/132 , H04N19/159 , H04N19/176
Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
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公开(公告)号：US11750842B2
公开(公告)日：2023-09-05
申请号：US17724298
申请日：2022-04-19
Inventor： Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
CPC classification number: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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Patent Agency Ranking
公开(公告)号：US11736693B2
公开(公告)日：2023-08-22
申请号：US17580344
申请日：2022-01-20
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
CPC classification number: H04N19/119 , H04N19/176 , H04N19/50 , H04N19/60
Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.
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公开(公告)号：US11665366B2
公开(公告)日：2023-05-30
申请号：US17867926
申请日：2022-07-19
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Jing Ya Li , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Ryuichi Kanoh
IPC: H04N19/52
CPC classification number: H04N19/52
Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
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公开(公告)号：US11558635B2
公开(公告)日：2023-01-17
申请号：US17323936
申请日：2021-05-18
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N11/02 , H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US11503281B2
公开(公告)日：2022-11-15
申请号：US17681051
申请日：2022-02-25
Inventor： Jing Ya Li , Chong Soon Lim , Han Boon Teo , Che Wei Kuo , Hai Wei Sun , Chu Tong Wang , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/105 , H04N19/14 , H04N19/159 , H04N19/176
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.
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公开(公告)号：US11425411B2
公开(公告)日：2022-08-23
申请号：US17317312
申请日：2021-05-11
Inventor： Jing Ya Li , Chong Soon Lim , Ru Ling Liao , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/00 , H04N19/513 , H04N19/139 , H04N19/159 , H04N19/176
Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.
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