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131.发明申请公开(公告)号：US20230095733A1
公开(公告)日：2023-03-30
申请号：US16971550
申请日：2019-10-29
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G5/00 , G09G3/3208
Abstract: The present disclosure provides a display substrate, a method for manufacturing the same, a driving method and a display device. The display substrate includes a base substrate, gate lines, data lines and sub-pixels. The sub-pixels include sub-pixel columns corresponding to the data lines in a one-to-one manner. In a sub-pixel driving circuit of the sub-pixel, a driving transistor and a data writing transistor are located at a first side of an aperture area of the sub-pixel; a sensing transistor is located at a second side of the aperture area of the sub-pixel. The first side and the second side are opposite sides of the aperture area along the extension direction of the data lines. Gate electrodes of sensing transistors in a same sub-pixel row, and gate electrodes of data writing transistors in an adjacent next sub-pixel row, are all coupled to a gate line corresponding to the adjacent next sub-pixel row. There is a first overlapping area between an orthographic projection of a first electrode plate of the storage capacitor to the base substrate and an orthographic projection of a second electrode plate of the storage capacitor to the base substrate; an orthographic projection of the first overlapping area to the base substrate at least partially overlaps an orthographic projection of the corresponding aperture area of the sub-pixel.
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公开(公告)号：US20230080385A1
公开(公告)日：2023-03-16
申请号：US17802776
申请日：2021-10-13
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/36
Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.
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133.发明申请公开(公告)号：US20230052249A1
公开(公告)日：2023-02-16
申请号：US17944523
申请日：2022-09-14
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/00 , G09G3/3275
Abstract: A pixel circuit includes a data line, a sensing line, a first pixel sub-circuit and a second pixel sub-circuit. The first pixel sub-circuit includes a first writing unit, a first sensing unit and a first driving unit. The first driving unit is configured to drive a first light-emitting unit to emit light. The second pixel sub-circuit includes a second writing unit, a second sensing unit and a second driving unit. The second driving unit is configured to drive a second light-emitting unit to emit light. The first writing unit and the second sensing unit are both configured to be connected to a gate driving unit. The second writing unit and the first sensing unit are both configured to be connected to another gate driving unit.
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134.发明申请公开(公告)号：US20230041664A1
公开(公告)日：2023-02-09
申请号：US17793075
申请日：2021-04-02
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register unit includes a first input/output unit which includes a first pull-down control circuit and a first auxiliary input circuit, and a second input/output unit which includes a second pull-down control circuit and a second auxiliary input circuit. The first pull-down control circuit controls a level of a first pull-down node. The first auxiliary input circuit is coupled to the first pull-down control circuit and controls the first pull-down control circuit together with a level of a first pull-up node in response to a display control signal and a blanking control signal. The second pull-down control circuit controls a level of a second pull-down node. The second auxiliary input circuit is coupled to the second pull-to down control circuit and controls the second pull-down control circuit together with a level of a second pull-up node in response to the display control signal and the blanking control signal.
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公开(公告)号：US11568820B2
公开(公告)日：2023-01-31
申请号：US16966205
申请日：2020-01-20
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A display panel, a display device, and a drive method are provided. The display panel includes a plurality of sub-pixel units arranged in an array and a gate drive circuit, and the array includes N rows. The gate drive circuit includes a plurality of cascaded shift register units and N+1 output terminals arranged in sequence, each of the plurality of cascaded shift register units is configured to output a gate scan signal for driving at least two rows of sub-pixel units in the N rows of the array to work; pixel drive circuits of an (n)-th row of sub-pixel units are connected to an (n)-th output terminal of the gate drive circuit to receive the gate scan signal as a scan drive signal, and sensing circuits of the (n)-th row of sub-pixel units are connected to an (n+1)-th output terminal of the gate drive circuit.
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Patent Agency Ranking
公开(公告)号：US11568791B2
公开(公告)日：2023-01-31
申请号：US17279478
申请日：2020-05-25
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/32 , G09G3/20 , G11C19/28 , G09G3/3266
Abstract: The present disclosure discloses a shift register, a gate driving circuit and a display device. The shift register includes a display pre-charge reset circuit, a sensing cascade circuit, a sensing pre-charge reset circuit, a pull-down control circuit and an output circuit, where the display pre-charge reset circuit, the sensing cascade circuit and the sensing pre-charge reset circuit share the same pull-down control circuit and the same output circuit, the output circuit is coupled to at least one signal output terminal, the output circuit includes output sub-circuits in one-to-one correspondence with the at least one signal output terminal, and each output sub-circuit is configured to write a driving clock signal into the corresponding signal output terminal in a display output stage and a sensing output stage in response to a control of a voltage of a pull-up node in an effective level state.
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137.发明授权公开(公告)号：US11538416B2
公开(公告)日：2022-12-27
申请号：US17261652
申请日：2020-04-07
Inventor： Xuehuan Feng , Yongqian Li
IPC: G11C19/00 , G09G3/3266 , G09G3/20 , G09G3/36 , G11C19/28
Abstract: A shift register circuit includes a first input sub-circuit, an output sub-circuit and an output control sub-circuit. The first input sub-circuit transmits a signal received at a second signal input terminal to a pull-up node. The output sub-circuit transmits a signal received at a first clock signal terminal to a shift signal output terminal, and transmits a signal received at an output signal transmission terminal to a first scan signal output terminal. The output control sub-circuit transmits a signal received at a chamfering signal terminal to the first scan signal output terminal in a predetermined time before the first scan signal output terminal stops outputting the signal from the output signal transmission terminal. The chamfering signal terminal transmits a signal with a voltage amplitude within a variation range of a voltage amplitude of a signal of the first scan signal output terminal.
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公开(公告)号：US20220384757A1
公开(公告)日：2022-12-01
申请号：US17642810
申请日：2021-04-16
Inventor： Chinlung LIAO
Abstract: The present disclosure provides a light emitting device, a display substrate and a display device. The light emitting device of the present disclosure includes: a first electrode and a second electrode opposite to each other; a plurality of light-emitting units stacked between the first electrode and the second electrode; and a third electrode between adjacent light-emitting units. The first electrode and the second electrode are both electrically coupled to a first signal terminal, the third electrode is coupled to a second signal terminal, and the first signal terminal is configured to provide a first signal and the second signal terminal is configured to provide a second signal such that only part of the plurality of light-emitting units emits light at a same time.
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139.发明申请公开(公告)号：US20220359623A1
公开(公告)日：2022-11-10
申请号：US17869079
申请日：2022-07-20
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H01L27/32
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.
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公开(公告)号：US20220344224A1
公开(公告)日：2022-10-27
申请号：US17435098
申请日：2020-02-27
Inventor： Yongqian LI , Can YUAN , Meng LI , Xuehuan FENG , Zhongyuan WU , Zhidong YUAN
Abstract: The present disclosure provides a motherboard and a manufacturing method for the motherboard, the motherboard includes at least one display area, a periphery area surrounding the at least one display area, a plurality of test terminals, an electrostatic discharge line, a plurality of resistors and at least one thin film transistor. The plurality of test terminals are respectively electrically connected to the electrostatic discharge line through the plurality of resistors. At least one of the plurality of resistors includes an inorganic nonmetal trace. The at least one thin film transistor includes an active layer, and the inorganic nonmetal trace includes a same semiconductor matrix material as the active layer of the at least one thin film transistor.
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