-
公开(公告)号：US20250056994A1
公开(公告)日：2025-02-13
申请号：US18933239
申请日：2024-10-31
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
-
公开(公告)号：US12217696B2
公开(公告)日：2025-02-04
申请号：US17914047
申请日：2021-11-09
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/32 , G11C19/28
Abstract: A scan driving circuit includes shift registers and clock signal lines. A shift register includes: an output circuit electrically connected to a scan input signal terminal and a pull-up node; a black frame insertion circuit electrically connected to a first clock signal terminal, a black frame insertion input signal terminal, a first voltage signal terminal, a second clock signal terminal and the pull-up node; and an output circuit electrically connected to the pull-up node, a third clock signal terminal, a shift signal terminal, a fourth clock signal terminal and a first output signal terminal. The shift registers include first shift registers and second shift registers. Third and fourth clock signal terminals of a first shift register are electrically connected to a same clock signal line. Third and fourth clock signal terminals of a second shift register are electrically connected to different clock signal lines.
-
公开(公告)号：US12217678B2
公开(公告)日：2025-02-04
申请号：US18257521
申请日：2022-04-27
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3233 , H10K59/121 , H10K59/131
Abstract: A display substrate includes a plurality of pixel circuits, and the pixel circuits each include a sensing circuit and a light-emitting control circuit. In a second direction, adjacent three rows of pixel circuits are a first row of pixel circuits, a second row of pixel circuits and a third row of pixel circuits. A region between the first row of pixel circuits and the second row of pixel circuits is a first gap region. In the first row of pixel circuits and the second row of pixel circuits, a sensing circuit of each pixel circuit is closer to the first gap region than a light-emitting control circuit of the pixel circuit, and sensing signal terminals of sensing circuits of two pixel circuits in a same column are a same signal terminal.
-
公开(公告)号：US12200989B2
公开(公告)日：2025-01-14
申请号：US17630171
申请日：2021-04-12
Inventor： Yongqian Li , Zhenhua Qiu , Ying Wang , Meng Li , Dongxu Han , Dacheng Zhang , Shi Sun
IPC: H10K59/131 , H10K50/86 , H10K59/12 , H10K59/121 , H10K71/00
Abstract: Provided in the present disclosure are a display substrate and a preparation method therefor, and a display apparatus. The display substrate comprises a plurality of display units, each display unit comprising a display area and a transparent area, and the display area comprising a plurality of sub-pixels; each sub-pixel comprises a second metal layer and a third metal layer, the second metal layer comprising a first scanning line and a second scanning line defining a display row, the third metal layer comprising a first power source line, a second power source line, a compensation line, and a data line defining the plurality of sub-pixels; the first power source line, the second power source line, the compensation line, and the data line all comprise a vertical linear section and a horizontal polyline section.
-
公开(公告)号：US20250006121A1
公开(公告)日：2025-01-02
申请号：US18275228
申请日：2022-07-28
IPC: G09G3/3225 , G09G3/32
Abstract: Provided is a compensation method for a display device. The method includes: acquiring first detection voltages of the plurality of subpixels during a first shutdown compensation process; acquiring first position indication information based on the first detection voltages of the plurality of subpixels; and determining first compensation data based on the first position indication information. The first position indication information indicates column positions of pixels to which a plurality of first subpixels of the plurality of subpixels belong. The first compensation data includes first threshold compensation voltages of the plurality of subpixels, and an absolute value of a difference between the first threshold compensation voltage of the first subpixel and a first reference value is less than an absolute value of a difference between a second threshold compensation voltage of the first subpixel in the first compensation data and the first reference value.
-
Patent Agency Ranking
公开(公告)号：US20240402966A1
公开(公告)日：2024-12-05
申请号：US18261152
申请日：2022-06-29
Inventor： Xiaolong WEI , Wenchao BAO , Song MENG , Yao ZHANG , Miao LIU , Cheng XU , Jingbo XU
IPC: G06F3/14
Abstract: A display device includes: a display screen, a drive circuit, a first controller and a second controller. The display screen includes a first display region and a second display region. The drive circuit is configured to transmit a control signal to at least one of the first controller or the second controller. The first controller is configured to, responding to the control signal, perform a display control on the first display region. The second controller is configured to, responding to the control signal, perform a display control on the second display region. A display time difference between the first display region and the second display region is less than a threshold time period.
-
公开(公告)号：US20240397650A1
公开(公告)日：2024-11-28
申请号：US18696957
申请日：2023-07-04
IPC: H05K5/02
Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes: a base substrate including a display area and a first frame area located on one side of the display area; and a first power bus at least located in the first frame area. The first power bus includes a first sub-bus, a second sub-bus and at least two connecting wires. The first sub-bus is located between the second sub-bus and the display area, and the first sub-bus is electrically connected to the second sub-bus by means of the at least two connecting wires.
-
公开(公告)号：US20240389402A1
公开(公告)日：2024-11-21
申请号：US18783461
申请日：2024-07-25
Inventor： Wenbin JIA
IPC: H10K59/122 , H10K71/13 , H10K71/15
Abstract: A display substrate includes a peripheral display region and a central display region. Multiple first pixel units are regularly arranged within the peripheral display region, and multiple second pixel units are regularly arranged within the central display region. Pixels Per Inch of the first pixel units within the peripheral display region is greater than Pixels Per Inch of the second pixel units within the central display region; or, Pixels Per Inch of the first pixel units within the peripheral display region is equal to Pixels Per Inch of the second pixel units within the central display region, and an area of the first pixel unit is larger than an area of the second pixel unit.
-
公开(公告)号：US20240381716A1
公开(公告)日：2024-11-14
申请号：US18249397
申请日：2022-05-20
Inventor： Luke DING , Yongqian LI , Can YUAN
IPC: H10K59/131
Abstract: The disclosure provides a display substrate, which has a display region and a peripheral region, and includes a base substrate, a plurality of sub-pixels, a first power signal line and a second power signal line at least partially located in the display region, a first power signal bus and a second power signal bus located in the peripheral region; the sub-pixels are located in the display region; the first power signal line and the second power signal line are electrically connected to the first power signal bus and the second power signal bus, respectively; the second power signal bus includes a first part disposed on a side of the first power signal bus close to the display region, and a second part disposed on a side of the first power signal bus away from the display region, so as to at least partially surround the first power signal bus.
-
公开(公告)号：US20240379034A1
公开(公告)日：2024-11-14
申请号：US18033382
申请日：2022-04-29
IPC: G09G3/00 , G09G3/3233
Abstract: Provided is a display panel, including: a storage module configured to store a first mapping relationship table, the first mapping relationship table showing correspondence between luminance accumulation amounts of each light emitting elements in the display panel and luminance compensation gain values; an accumulation module configured to accumulate, when the display panel being powered on, luminance data of each light emitting element in real time to obtain a real-time accumulation amount of the luminance data; a main control module configured to search, according to the real-time accumulation amount of the luminance data, a corresponding luminance compensation gain value in the first mapping relationship table; calculate a real-time data signal for lighting each light emitting element according to the luminance compensation gain value and a real-time target luminance value of the light emitting element; light the light emitting element in real time according to the real-time data signal.
-
-
-
-
-
-
-
-
-
Search Results
453
records
(took 0.031 seconds)
