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公开(公告)号：US20210167162A1
公开(公告)日：2021-06-03
申请号：US17040260
申请日：2019-11-29
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Meng LI , Zhidong YUAN , Xuehuan FENG , Lang LIU , Dacheng ZHANG
IPC: H01L27/32
Abstract: The present disclosure relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a display panel. In the array substrate, a substrate is provided with a first transistor and a second transistor, a first electrode of the first transistor is electrically connected to a gate of the second transistor; a conductive layer is disposed on the substrate, and includes a first conductor portion, a first semiconductor portion, a second conductor portion that are sequentially connected along a first direction; a first gate insulating layer is disposed on a side of the conductive layer away from the substrate; a first gate layer is disposed on a side of the first gate insulating layer away from the substrate to form the gate of the second transistor; a dielectric layer is disposed on the substrate to cover a part of the first conductor portion, a part of the second conductor portion and a part of the first gate layer, and an orthographic projection of a first via hole disposed on the dielectric layer on the substrate overlaps with orthographic projections of at least a part of the first conductor portion, at least a part of the second conductor portion and the first gate layer on the substrate; and a first source/drain layer is disposed on a side of the dielectric layer away from the substrate to cover the first via hole.
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公开(公告)号：US20210166621A1
公开(公告)日：2021-06-03
申请号：US16618300
申请日：2018-12-26
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3208 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method. The shift register unit includes a blanking input circuit, a display input circuit, an output circuit, and a compensation selection circuit. The blanking input circuit inputs a blanking input signal to a control node, and a blanking signal to a first node in a blanking period of a frame; the display input circuit inputs a display signal to the first node in a display period of the frame in response to a display input signal; the output circuit outputs, under the control of a level of the first node, a composite output signal to an output terminal; the compensation selection circuit is electrically coupled to the output terminal, and charges, in response to a compensation selection control signal, the control node using the composite output signal.
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公开(公告)号：US20210134230A1
公开(公告)日：2021-05-06
申请号：US16639052
申请日：2019-07-18
Inventor： Zhidong YUAN , Can YUAN , Yongqian LI
IPC: G09G3/3275
Abstract: The present disclosure provides an organic light emitting diode (OLED) display device and control method thereof. The OLED display device includes: a plurality of subpixels that are arranged in an array having a plurality of rows and a plurality of columns, wherein at least one of the subpixels comprises a control transistor, a light emitting element, and a drive transistor for driving the light emitting element; a plurality of detection lines, wherein at least one of the detection lines is electrically connected with the control transistors of subpixels in a same column, for detecting an electrical property of the drive transistors of subpixels in the same column through respective control transistors; and a plurality of group detection control lines, wherein at least one of the group detection control lines is electrically connected with control transistors of a subpixel group, the subpixel group comprising subpixels in a first row and subpixels in a second row.
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公开(公告)号：US20210090481A1
公开(公告)日：2021-03-25
申请号：US17040972
申请日：2020-03-03
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yongqian LI
Abstract: The present application discloses a clock signal test circuit, a control method thereof, a display panel and a test device. The clock signal test circuit comprises: N clock control signal lines; M control sub-circuits, each of which includes at least two control branches, wherein each of the control branches is configured to output a signal input from the input signal line to the corresponding output signal line under the control of a signal input from the corresponding clock control signal line; and a pull-down sub-circuit including N pull-down branches, wherein each of the pull-down branches is configured to output the first power supply voltage to the corresponding output signal line under the control of the signal input from the corresponding clock control signal line.
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公开(公告)号：US20210065630A1
公开(公告)日：2021-03-04
申请号：US16633082
申请日：2019-07-31
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266
Abstract: The present application provides a shift register, a gate driving circuit, a display device and a gate driving method. The shift register includes an input circuit, an inverter circuit and an output circuit. The input circuit, the inverter circuit and the output circuit are coupled to a pull-up node, and the output circuit and the inverter circuit are coupled to a pull-down node. The input circuit is configured to control a voltage at the pull-up node in response to an input signal. The inverter circuit is configured to invert the voltage at the pull-up node and output the inverted voltage to the pull-down node. The output circuit is configured to output a multi-pulse signal within a duration of one frame under control of the voltage at the pull-up node and a voltage at the pull-down node.
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Patent Agency Ranking
公开(公告)号：US20210043145A1
公开(公告)日：2021-02-11
申请号：US16825426
申请日：2020-03-20
Inventor： Yongqian LI
IPC: G09G3/3266 , H01L27/32
Abstract: The present disclosure discloses an array substrate and a driving method thereof, a display panel and a display device. The array substrate comprises: a plurality of gate scanning lines extending in a first direction, a plurality of data lines extending in a second direction and detection signal lines, where the data lines and the gate scanning lines are crossed to define a plurality of pixel circuits arranged in an array. The pixel circuits comprise: first transistors, second transistors, driving transistors, capacitors, and light emitting devices, and in the same pixel circuit, the first transistor and the second transistor are electrically connected to different gate scanning lines.
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公开(公告)号：US20210043137A1
公开(公告)日：2021-02-11
申请号：US16914485
申请日：2020-06-29
Inventor： Xuehuan FENG , Yongqian LI , Yubao KONG
IPC: G09G3/3225
Abstract: Disclosed is a display substrate and a display apparatus, the display substrate includes a display area and a peripheral area, wherein the display substrate includes M groups of shift registers and N groups of clock signal lines in the peripheral area, M is greater than or equal to N, M and N are positive integers, each group of shift registers is connected with a group of gate lines positioned in the display area, and adjacent N groups of shift registers are connected with N groups of clock signal lines one by one correspondingly. The N groups of clock signal lines are disposed side by side along a first direction, and configured to make, through an adjustment of a wiring sequence, an impedance difference between two groups of clock signal lines connected to any two adjacent groups of shift registers be less than or equal to an impedance threshold value.
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公开(公告)号：US20200211436A1
公开(公告)日：2020-07-02
申请号：US16550848
申请日：2019-08-26
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN
Abstract: A shift register of the present disclosure includes: an input sub-circuit configured to transmit an input signal from an input signal terminal to a feedback node under the control of a first clock signal terminal; a pull-up control sub-circuit configured to transmit a feedback signal of the feedback node to a pull-up node under the control of the first clock signal terminal; a feedback sub-circuit configured to transmit a first voltage signal from a first voltage signal terminal to the feedback node under the control of the pull-up node; an output sub-circuit configured to transmit a second clock signal from a second clock signal terminal to the output signal terminal under the control of the pull-up node; and a pull-down circuit configured to transmit a second voltage signal from a second voltage signal terminal to the output signal terminal under the control of the first clock signal terminal.
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公开(公告)号：US20200043564A1
公开(公告)日：2020-02-06
申请号：US16434200
申请日：2019-06-07
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yongqian LI , Zhidong YUAN
Abstract: A gate driving circuit includes M levels of shift registers. Each level of shift register includes a first register unit and a second register unit. The first register units of the M levels of shift registers are connected to each other in a cascaded manner, the second register units of the M levels of shift registers are connected to each other in a cascaded manner, and an output end of the first register unit and an output end of the second register unit of each level of shift register are electrically connected to an output end of the level of shift register, where M is a positive integer greater than or equal to 1.
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140.发明申请公开(公告)号：US20190386033A1
公开(公告)日：2019-12-19
申请号：US16440615
申请日：2019-06-13
Inventor： Meng LI , Yongqian LI , Min HE
IPC: H01L27/12 , H01L27/32 , G09G3/3291 , G09G3/3266 , G09G3/3233
Abstract: Embodiments of the present disclosure provide an OLED array substrate, a method for fabricating an OLED array substrate, an OLED pixel circuit, an OLED array substrate including the OLED pixel circuit, and a display device including the OLED array substrate. The OLED array substrate includes a substrate, an OLED arranged on the substrate, and a photosensor positioned between the OLED and the substrate. The photosensor includes a first electrode, a photosensitive layer, and a second electrode sequentially arranged from bottom to top. The OLED includes an anode, an organic light-emitting layer, and a cathode sequentially arranged from bottom to top. The anode includes a first portion and a second portion.
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