Speaker recognition with assessment of audio frame contribution

    公开(公告)号:US10726849B2

    公开(公告)日:2020-07-28

    申请号:US15666280

    申请日:2017-08-01

    Abstract: This application describes methods and apparatus for speaker recognition. An apparatus according to an embodiment has an analyzer (202) for analyzing each frame of a sequence of frames of audio data (AIN) which correspond to speech sounds uttered by a user to determine at least one characteristic of the speech sound of that frame. An assessment module (203) determines, for each frame of audio data, a contribution indicator of the extent to which the frame of audio data should be used for speaker recognition processing based on the determined characteristic of the speech sound. In this way frames which correspond to speech sounds that are of most use for speaker discrimination may be emphasized and/or frames which correspond to speech sounds that are of least use for speaker discrimination may be de-emphasized.

    Audio processing
    153.
    发明授权

    公开(公告)号:US10720171B1

    公开(公告)日:2020-07-21

    申请号:US16280288

    申请日:2019-02-20

    Abstract: In a method of audio processing, a plurality of audio samples are received, and are concatenated to form a composite audio signal. The composite audio signal is analysed to identify audio artefacts associated with concatenation in the composite audio signal, and any identified audio artefacts are compensated for, to form a corrected composite audio signal. The corrected composite audio signal is provided to a voice biometrics module.

    Processing circuitry
    154.
    发明授权

    公开(公告)号:US10649732B2

    公开(公告)日:2020-05-12

    申请号:US16050990

    申请日:2018-07-31

    Abstract: This application relates to apparatus and methods for the multiplication of signals. A multiplication circuit (100) has first and second time-encoding modulators (103a, 103b) configured to receive first and second combined signals (SC1, SC2) respectively, and generate respective first and second PWM signals (SPWM1, SPWM2), each with a cycle frequency that depends substantially on the square of the value of the input combined signal. The first combined signal (SC1) corresponds to a sum of a first and second input signals (S1, S2) and the second combined signal (SC2) corresponds to the difference between the first and second input signals (S1, S2). First and second time-decoding converters (104a, 104b) receive the first and second PWM signals and provide respective first and count values (D1, D2) based on a parameter related to the frequency of the respective first or second PWM signal. A subtractor (105) determine a difference between the first and second count values (D1, D2) and provides an output signal (DOUT) based on this difference.

    Class D amplifiers
    155.
    发明授权

    公开(公告)号:US10587232B2

    公开(公告)日:2020-03-10

    申请号:US15982237

    申请日:2018-05-17

    Abstract: The present disclosure relates to Class D amplifier circuitry comprising: an input for receiving an input signal; first and second output nodes for driving a load connected between the first and second output nodes. A first driver stage is provided for switching the first node between a first supply rail and a second supply rail, and a second driver stage is provided for switching the second node between the first supply rail and the second supply rail. The Class D amplifier circuitry also includes first driver control circuitry configured to receive a first carrier wave and control the switching of the first driver stage based in part on the first carrier wave; second driver control circuitry configured to receive a second carrier wave and control the switching of the second driver stage based in part on the second carrier wave; and a carrier wave generator configured to provide the first carrier wave and the second carrier wave. A phase shift between the first carrier wave and the second carrier wave is adjustable responsive to a mode control signal.

    Analogue signal paths
    156.
    发明授权

    公开(公告)号:US10554189B2

    公开(公告)日:2020-02-04

    申请号:US15992847

    申请日:2018-05-30

    Abstract: This application relates to audio circuits, such as audio driving circuits, with improved audio performance. An audio arrangement (200) has an audio circuit (201) with a forward signal path between an input (102) for an input digital audio signal (DIN) and an output (103) for an output analogue audio signal (AOUT). The circuit also has a feedback path comprising an analogue-to-digital conversion module (202) for receiving an analogue feedback signal (VFB) derived from the output analogue audio signal and outputting a corresponding digital feedback signal (DFB). The analogue-to-digital conversion module (202) has an ADC (108), an analogue gain element (203) configured to apply analogue gain (GA) to the analogue feedback signal before the ADC and a digital gain element (204) for applying digital gain (GD) to a signal output from the ADC. A gain controller (205) controls the analogue gain and the digital gain applied based on the input digital audio signal (DIN).

    Speaker verification
    157.
    发明授权

    公开(公告)号:US10540978B2

    公开(公告)日:2020-01-21

    申请号:US15992562

    申请日:2018-05-30

    Abstract: A method of speaker verification comprises: comparing a test input against a model of a user's speech obtained during a process of enrolling the user; obtaining a first score from comparing the test input against the model of the user's speech; comparing the test input against a first plurality of models of speech obtained from a first plurality of other speakers respectively; obtaining a plurality of cohort scores from comparing the test input against the plurality of models of speech obtained from a plurality of other speakers; obtaining statistics describing the plurality of cohort scores; modifying said statistics to obtain adjusted statistics; normalising the first score using the adjusted statistics to obtain a normalised score; and using the normalised score for speaker verification.

    Speech recognition
    158.
    发明授权

    公开(公告)号:US10431212B2

    公开(公告)日:2019-10-01

    申请号:US15614093

    申请日:2017-06-05

    Abstract: A speech recognition system comprises: an input, for receiving an input signal from at least one microphone; a first buffer, for storing the input signal; a noise reduction block, for receiving the input signal and generating a noise reduced input signal; a speech recognition engine, for receiving either the input signal output from the first buffer or the noise reduced input signal from the noise reduction block; and a selection circuit for directing either the input signal output from the first buffer or the noise reduced input signal from the noise reduction block to the speech recognition engine.

    Apparatus and methods for monitoring a microphone

    公开(公告)号:US10237668B2

    公开(公告)日:2019-03-19

    申请号:US15935542

    申请日:2018-03-26

    Abstract: This application describes an apparatus (300) for monitoring for blockage of an acoustic (110) port of a microphone device (100). The apparatus has a spectrum peak detect block (301) for receiving a microphone signal (SMIC) and determining, from the microphone signal, a resonance frequency (fH) and a quality factor (QH) of a resonance (202) associated with the acoustic port. A condition monitoring block (302) is configured to determine any change in resonance frequency and quality factor and to determine a blockage status for the microphone based on said detect changes. The condition monitoring block identifies a change in blockage status if there is a change in quality factor.

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