公开(公告)号：US4918378A

公开(公告)日：1990-04-17

申请号：US364412

申请日：1989-06-12

Applicant: Haluk Katircioglu ,  John A. De Beule ,  Debaditya Mukherjee

Inventor： Haluk Katircioglu ,  John A. De Beule ,  Debaditya Mukherjee

IPC: G06F11/22 ,  G06F11/267 ,  G06F11/27 ,  G11C29/32 ,  G11C29/40

CPC classification number: G11C29/32 ,  G11C29/40 ,  G06F11/2236 ,  G06F11/2273 ,  G06F11/27

Abstract: A method for internal self-testing is provided for a VLSI chip having gates, logic, registers, memory circuitry, etc. The registers are connected into a shift chain circuit form. A set of control flip-flops operate to convert the registers to multifunction shift registers (MFSR's) which operate as flip-flops during a test cycle and as latches during normal operations. Selected MFSR's function to generate test patterns to the chip circuitry which have output signals to an output MFSR which collects a signature that can be compared to a predetermined signature to determine error-free or error-incurred operation of the VLSI circuitry.

Abstract translation: 为具有门，逻辑，寄存器，存储器电路等的VLSI芯片提供了一种用于内部自检的方法。寄存器连接到换档链电路形式。 一组控制触发器用于将寄存器转换为在测试周期期间作为触发器操作的多功能移位寄存器（MFSR），以及在正常操作期间作为锁存器。 选择的MFSR的功能是向芯片电路产生测试模式，该芯片电路具有输出信号到输出MFSR，该输出MFSR收集可与预定签名进行比较的签名，以确定VLSI电路的无差错或错误的操作。