Abstract:
An integrated low-IF (low intermediate frequency) terrestrial broadcast receiver and associated method are disclosed that provide an advantageous and cost-efficient solution. The integrated receiver includes a mixer, local OSC oscillator generation circuitry, low-IF conversion circuitry, and DSP circuitry. And the integrated receiver is particularly suited for small, portable devices and the reception of terrestrial audio broadcasts, such as FM and AM terrestrial audio broadcast, in such portable devices.
Abstract:
An integrated low-IF (low intermediate frequency) terrestrial broadcast receiver and associated method are disclosed that provide an advantageous and cost-efficient solution. The integrated receiver includes a mixer, local oscillator generation circuitry, low-IF conversion circuitry, and DSP circuitry. And the integrated receiver is particularly suited for small, portable devices and the reception of terrestrial audio broadcasts, such as FM and AM terrestrial audio broadcast, in such portable devices.
Abstract:
An integrated low-IF (low intermediate frequency) terrestrial broadcast receiver and associated method are disclosed that provide an advantageous and cost-efficient solution. The integrated receiver includes a mixer, local oscillator generation circuitry, low-IF conversion circuitry, and DSP circuitry. And the integrated receiver is particularly suited for small, portable devices and the reception of terrestrial audio broadcasts, such as FM and AM terrestrial audio broadcast, in such portable devices.
Abstract:
A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.
Abstract:
Integrated low-IF (low intermediate frequency) data receivers and associated methods are disclosed that provide advantageous and cost-efficient solutions.
Abstract:
A receiver includes a gain stage, a peak detector and a processor. The gain stage provides an output signal, and the peak detector provides a binary indication of whether the output signal has reached a predetermined threshold. The processor controls the gain stage in response to the binary indication.
Abstract:
A technique includes selectively coupling impedances to an oscillator to establish a first frequency of operation of the oscillator. The technique includes repeating the selective coupling in a feedback loop to cause the first frequency to be near a second frequency.
Abstract:
A digital tuning error correction system for an integrated receiver and associated method are disclosed that provide an advantageous solution for combining digital signal processing (DSP) circuitry on the same integrated circuit as mixer and local oscillator (LO) generation circuitry.
Abstract:
A ratiometric clock system for an integrated receiver and associated method are disclosed that provide an advantageous solution for combining digital signal processing (DSP) circuitry on the same integrated circuit as mixer and local oscillator (LO) generation circuitry. The generation circuitry generates an oscillation signal that is passed through a first divider to generate mixing signals for the mixer that is passed through a second divider to generate a digital clock signal that is utilized by the DSP circuitry. This digital clock signal can be utilized by integrated analog-to-digital conversion circuitry, as well.
Abstract:
Receiver architectures and related methods are disclosed for high definition (HD) and digital radio FM broadcast receivers. The radio receiver architectures are configured to utilize multiple analog-to-digital converters (ADCs) to handle the digital radio spectrum and can be configured to modify a target IF frequencies depending upon the mode of operation of the receiver. For example, the receiver can include an analog FM reception mode and a digital FM reception mode for which different down-conversions are used for the same analog-plus-digital audio broadcast channel. If desired, the radio broadcast receivers disclosed can be configured so that they only receive digital FM radio content, for example, if the analog FM broadcast was of no interest and/or if the broadcast was all digital.