Enumeration method for the link clock rate and the pixel/audio clock rate
    11.
    发明申请
    Enumeration method for the link clock rate and the pixel/audio clock rate 有权
    链接时钟速率和像素/音频时钟速率的枚举方法

    公开(公告)号:US20040218625A1

    公开(公告)日:2004-11-04

    申请号:US10726934

    申请日:2003-12-02

    Inventor: Osamu Kobayashi

    CPC classification number: G09G5/006

    Abstract: An enumeration method for the link rate and a pixel/audio clock rate. The method can be performed by expressing the pixel/audio clock rate and the link rate with four parameters, A, B, C, and D based upon a master frequency 23.76 GHz as 210null33null57null111 Hz, and regenerating a pixel/audio clock from the link clock.

    Abstract translation: 链路速率和像素/音频时钟速率的枚举方法。 该方法可以通过基于主频率23.76GHz作为210x33x57x111Hz的四个参数A,B,C和D表达像素/音频时钟速率和链路速率来执行,并且从链路再生像素/音频时钟 时钟。

    Method and apparatus for efficient transmission of multimedia data packets
    12.
    发明申请
    Method and apparatus for efficient transmission of multimedia data packets 失效
    用于高效传输多媒体数据包的方法和装置

    公开(公告)号:US20040218598A1

    公开(公告)日:2004-11-04

    申请号:US10726438

    申请日:2003-12-02

    Inventor: Osamu Kobayashi

    Abstract: A transmission efficient packet based display interface arranged to couple a multimedia source device to a multimedia sink device is disclosed. The transmission efficient interface includes a bi-directional auxiliary channel arranged to transfer information between the multimedia source device and the multimedia sink device and vice versa, wherein the information transferred over the auxiliary channel includes a set of packet attributes. The interface also includes a unidirectional main link arranged to carry a number multimedia data packets from the transmitter unit to the receiver unit each having a multimedia data packet header. In the described embodiment, each of the headers is substantially reduced in size over what would otherwise be necessary since the packet attributes are communicated via the auxiliary channel prior to the transmission of the main link packets over main link thereby minimizing the packet overhead and providing a very high main link efficiency.

    Abstract translation: 公开了一种布置成将多媒体源设备耦合到多媒体接收设备的传输高效的基于分组的显示接口。 传输有效接口包括双向辅助信道,其被布置为在多媒体信源设备和多媒体接收设备之间传送信息,反之亦然,其中通过辅助信道传送的信息包括一组分组属性。 该接口还包括单向主链路,其被布置成将来自发射机单元的多个多媒体数据分组携带到每个具有多媒体数据分组报头的接收机单元。 在所描述的实施例中,每个头部的大小大体上减小了否则将是必要的,因为在通过主链路传输主链路分组之前通过辅助信道传送分组属性,从而最小化分组开销并提供 主链路效率非常高

    Method and system for adaptive color and contrast for display devices
    13.
    发明申请
    Method and system for adaptive color and contrast for display devices 有权
    显示设备自适应颜色和对比度的方法和系统

    公开(公告)号:US20040179022A1

    公开(公告)日:2004-09-16

    申请号:US10810137

    申请日:2004-03-26

    CPC classification number: G09G5/06 G09G2320/066 G09G2320/0666

    Abstract: A method and apparatus that allows a display device to adaptively and automatically control display contrast and color is disclosed. The method and system in accordance with the present invention can be described by the following sequential process: 1. Separating an input image data value into its luma and chroma components. 2. Collecting the luma distribution data over the entire image or a specified window. 3. Analyzing the luma distribution. 4. Generating an appropriate contrast control response that modifies the input luma component to generate an output luma component, on a pixel by pixel basis. 5. Analyzing the input luma component and the output luma component, and an input chroma component, to generate an appropriate modification for the chroma component, on a pixel by pixel basis.

    Abstract translation: 公开了允许显示设备自适应地且自动地控制显示对比度和颜色的方法和装置。 根据本发明的方法和系统可以通过以下顺序过程来描述:1.将输入图像数据值分离成其亮度和色度分量。 2.在整个图像或指定的窗口上收集亮度分布数据。 3.分析亮度分布。 4.产生适当的对比度控制响应,其修改输入亮度分量以逐个像素地生成输出亮度分量。 5.分析输入亮度分量和输出亮度分量以及输入色度分量,以逐像素为基础为色度分量生成适当的修改。

    Frequency converter and methods of use thereof
    14.
    发明申请
    Frequency converter and methods of use thereof 有权
    变频器及其使用方法

    公开(公告)号:US20030174797A1

    公开(公告)日:2003-09-18

    申请号:US10100803

    申请日:2002-03-18

    CPC classification number: H03L7/091 G06F1/08 H03L7/0994 H03L2207/50

    Abstract: An all-digital frequency conversion apparatus is provided that achieves frequency conversion using a simple phase detector and integer and fractional phase feedback information from a digital oscillator output. In an embodiment, a target phase accumulator unit generates a target phase signal to the phase detector unit. The target phase accumulator unit receives inputs from a reference signal input, and a target phase input value. The digital phase detector unit receives the reference signal, a current phase feedback input signal, and the target phase input signal. The phase detector unit outputs a frequency setting signal to a frequency value generator unit. The detector output is based on the difference between the current phase and the target phase. A frequency value generator unit is configured to output a frequency value signal to a digital oscillator unit that generates a corresponding digital output signal that is directly fed back to the current phase feedback input of the phase detector unit. A method, computing system, and software product that implement the present invention are also provided.

    Abstract translation: 提供一种全数字频率转换装置,其使用简单的相位检测器和来自数字振荡器输出的整数和分数相位反馈信息来实现频率转换。 在一个实施例中,目标相位累加器单元向相位检测器单元产生目标相位信号。 目标相位累加器单元从参考信号输入和目标相位输入值接收输入。 数字相位检测器单元接收参考信号,电流相位反馈输入信号和目标相位输入信号。 相位检测器单元向频率值发生器单元输出频率设定信号。 检测器输出基于电流相位和目标相位之间的差值。 频率值发生器单元被配置为将频率值信号输出到产生直接反馈到相位检测器单元的当前相位反馈输入的相应数字输出信号的数字振荡器单元。 还提供了实现本发明的方法,计算系统和软件产品。

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