公开(公告)号：US20060151875A1

公开(公告)日：2006-07-13

申请号：US10905534

申请日：2005-01-09

申请人： Zong-Huei Lin ,  Hung-Min Liu ,  Jui-Meng Jao ,  Wen-Tung Chang ,  Kuo-Ming Chen ,  Kai-Kuang Ho

发明人： Zong-Huei Lin ,  Hung-Min Liu ,  Jui-Meng Jao ,  Wen-Tung Chang ,  Kuo-Ming Chen ,  Kai-Kuang Ho

IPC分类号： H01L23/34

CPC分类号： H01L22/34 ,  H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line region through which the plurality of active circuit die areas are separated from each other by mechanical wafer dicing. Each of the plurality of active circuit die areas has four sides. An overcoat covers both the active circuit die areas and the dicing line region. An inter-layer dielectric layer is disposed underneath the overcoat. A reinforcement structure includes a plurality of holes formed within the dicing line region. The plurality of holes are formed by etching through the overcoat into the inter-layer dielectric layer and are disposed along the four sides of each active circuit die area. A die seal ring is disposed in between the active circuit chip area and the reinforcement structure.

摘要翻译： 半导体晶片包括多个有源电路管芯区域，每个有源电路管芯区域由切割线区域界定，多个有源电路管芯区域通过该切割线区域通过机械晶片切割彼此分离。 多个有源电路管芯区域中的每一个具有四个侧面。 覆盖层覆盖有源电路裸片区域和切割线区域。 层间介电层设置在外涂层的下方。 加强结构包括形成在切割线区域内的多个孔。 通过将外涂层蚀刻到层间电介质层中并沿着每个有源电路管芯区域的四个侧面设置多个孔。 模具密封环设置在有源电路芯片区域和加强结构之间。