-
公开(公告)号:US5387548A
公开(公告)日:1995-02-07
申请号:US131920
申请日:1993-10-04
Applicant: Jaeshin Cho
Inventor: Jaeshin Cho
IPC: H01L21/285 , H01L21/44
CPC classification number: H01L21/28575 , Y10S148/02
Abstract: The present invention includes forming an etched ohmic contact (10, 9) by applying a layer of an etch susceptible contact material (14) to a III-V semiconductor substrate (11). A portion of the contact layer (14A) is alloyed with the substrate (11) to form are etch resistant area (14A) of the contact layer. The contact layer (14) is selectively etched to remove etch susceptible portions of the contact layer while leaving the etch resistant area (14A) on the substrate (11). Another alloy operation is performed to form ohmic contact between the etch resistant area (14A) and the substrate (11). Consequently, an etch ohmic contact (10, 9) that is substantially devoid of gold is formed.
Abstract translation: 本发明包括通过向III-V半导体衬底(11)施加一层易蚀刻的接触材料(14)来形成蚀刻的欧姆接触(10,9)。 接触层(14A)的一部分与基底(11)合金化以形成接触层的耐蚀刻区域(14A)。 选择性地蚀刻接触层(14),以便在衬底(11)上留下抗蚀刻区域(14A)的同时去除接触层的易腐蚀部分。 执行另一合金操作以在耐蚀刻区域(14A)和基板(11)之间形成欧姆接触。 因此,形成基本上不含金的蚀刻欧姆接触(10,9)。