公开(公告)号：US4841476A

公开(公告)日：1989-06-20

申请号：US915423

申请日：1986-10-06

Applicant: James A. Mitchell ,  John F. Bechdel

Inventor： James A. Mitchell ,  John F. Bechdel

IPC: G06F9/455 ,  G06F9/318 ,  G06F9/38

CPC classification number: G06F9/30174 ,  G06F9/3879

Abstract: In a system which emulates execution of source CPU instructions and includes a translating unit (translator) for converting source instructions to target instructions and a target CPU instruction unit for processing and issuing translated target instructions, provision is made for accelerating instruction, translation, issue, and execution when certain source floating point arithmetic instructions are emulated for execution. When a source floating point arithmetic instruction is emulated, a token is placed in a wait queue in the translator to prevent the translation of any source instructions and issue of any target instructions until condition and interrupt information is available and validated. In addition, emulation of source RX-type floating point instructions is enhanced by provision of registers in the instruction unit which receive X-field denoted operands, and which thereby permit a target CPU execution unit to perform the emulation by conducting register-to-register operations.

Abstract translation: 在模拟源CPU指令的执行的系统中，包括用于将源指令转换为目标指令的转换单元（转换器）和用于处理和发出转换的目标指令的目标CPU指令单元，用于加速指令，转换，发行， 并且当某些源浮点运算指令被仿真以执行时执行。 当源浮点算术指令被仿真时，令牌将被放置在转换器中的等待队列中，以防止任何源指令的转换和任何目标指令的发出，直到条件和中断信息可用和验证为止。 此外，源RX型浮点指令的仿真通过在指令单元中提供接收X字段表示的操作数的寄存器来增强，从而允许目标CPU执行单元通过执行寄存器到寄存器来执行仿真 操作。