3D INTER-STRATUM CONNECTIVITY ROBUSTNESS
    11.
    发明申请
    3D INTER-STRATUM CONNECTIVITY ROBUSTNESS 有权
    3D内部连接性稳定性

    公开(公告)号:US20130055183A1

    公开(公告)日:2013-02-28

    申请号:US13217381

    申请日:2011-08-25

    Abstract: There is provided a method for verifying inter-stratum connectivity for two or more strata to be combined into a 3D chip stack. Each of the two or more strata has 3D elements including active 3D elements, mechanical 3D elements, and dummy 3D elements. The method includes performing a respective 2D layout versus schematic verification on each of the two or more strata with respect to at least the 3D elements to pre-ensure an absence of shorts between the 3D elements when the two or more strata are subsequently stacked into the 3D chip stack. The method further includes checking inter-stratum interconnectivity between each adjacent pair of strata in the 3D chip stack.

    Abstract translation: 提供了一种用于验证要组合成3D芯片堆栈的两个或更多个层的层间连通性的方法。 两个或更多个层中的每一个具有包括主动3D元素,机械3D元素和虚拟3D元素的3D元素。 该方法包括相对于至少3D元件在两个或更多个层中的每一个上执行相应的2D布局,以相对于示意图验证,以便当两个或更多个层随后被堆叠到3D元素中时预先确保在3D元件之间不存在短路 3D芯片堆栈。 该方法还包括检查3D芯片堆叠中每个相邻层之间的层间互连性。

    Hindering Side-Channel Attacks in Integrated Circuits
    12.
    发明申请
    Hindering Side-Channel Attacks in Integrated Circuits 审中-公开
    在集成电路中受阻的侧向通道攻击

    公开(公告)号:US20120124669A1

    公开(公告)日:2012-05-17

    申请号:US12945155

    申请日:2010-11-12

    CPC classification number: G06F21/86 G06F21/71 G06F21/755

    Abstract: A mechanism is provided for protecting a layer of functional units from side-channel attacks. A determination is made as to whether one or more subsets of functional units in a set of functional units in the layer of functional units is performing operations of a critical nature. Responsive to a determination that there is one or more subsets of functional units that are performing the operations of the critical nature, at least one concealing pattern is generated in a concealing layer in order to conceal the operations of the critical nature being performed by each of the subset of functional units. The concealing layer is electrically and physically coupled to the layer of functional units.

    Abstract translation: 提供了用于保护功能单元层免受侧信道攻击的机制。 确定功能单元层中的一组功能单元中的一个或多个功能单元的子集是否执行关键性质的操作。 响应于确定存在正在执行关键性质的操作的功能单元的一个或多个子集,在隐藏层中生成至少一个隐藏模式,以便隐藏正在执行的关键性质的操作 功能单元的子集。 隐藏层电性和物理耦合到功能单元层。

    Process for managing complex pre-wired net segments in a VLSI design
    13.
    发明授权
    Process for managing complex pre-wired net segments in a VLSI design 有权
    在VLSI设计中管理复杂的预先有线网段的过程

    公开(公告)号:US07681169B2

    公开(公告)日:2010-03-16

    申请号:US11846577

    申请日:2007-08-29

    CPC classification number: G06F17/5077

    Abstract: A method for pre-wiring through multiple levels of metal using flues includes steps of: receiving information comprising flue geometries and flue properties; producing multiple routing patterns of a design for the flues; identifying macro instance terminals to be pre-wired in the design; selecting at least one of the routing patterns for the macro instance terminals in the design to avoid blockage; and instantiating the design such that the flues can be manipulated as vias.

    Abstract translation: 使用烟道预先接线多层金属的方法包括以下步骤:接收包括烟道几何形状和烟道特性的信息; 生成针对流感的设计的多个路由模式; 识别要在设计中预先布线的宏实例终端; 在设计中选择用于宏实例终端的路由模式中的至少一个以避免阻塞; 并实例化设计,使得烟道可以被操纵为过孔。

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