FORWARD-PATH DIGITAL SUMMATION IN DIGITAL RADIO FREQUENCY TRANSPORT
    11.
    发明申请
    FORWARD-PATH DIGITAL SUMMATION IN DIGITAL RADIO FREQUENCY TRANSPORT 有权
    数字无线电频率传输中的前向数字数字建立

    公开(公告)号:US20140146906A1

    公开(公告)日:2014-05-29

    申请号:US14090139

    申请日:2013-11-26

    CPC classification number: G06Q10/087 H04B7/022

    Abstract: A distributed antenna switch includes a plurality of first interfaces, each of the plurality of first interfaces configured to receive a downlink serialized data stream from a different network interface across a different first digital communication link; at least one second interface, the at least one second interface configured to communicate an aggregate downlink serialized data stream to a remote antenna unit over a second digital communication link; and wherein the distributed antenna switch is configured to aggregate the plurality of downlink serialized data streams from the different network interfaces into the aggregate downlink serialized data stream.

    Abstract translation: 分布式天线开关包括多个第一接口,所述多个第一接口中的每一个被配置为通过不同的第一数字通信链路从不同的网络接口接收下行链路序列化数据流; 至少一个第二接口,所述至少一个第二接口被配置为通过第二数字通信链路将聚合下行链路序列化数据流传送到远程天线单元; 并且其中所述分布式天线开关被配置为将来自所述不同网络接口的所述多个下行链路序列化数据流聚合到所述聚合下行链路序列化数据流中。

    TIMESLOT MAPPING AND/OR AGGREGATION ELEMENT FOR DIGITAL RADIO FREQUENCY TRANSPORT ARCHITECTURE
    12.
    发明申请
    TIMESLOT MAPPING AND/OR AGGREGATION ELEMENT FOR DIGITAL RADIO FREQUENCY TRANSPORT ARCHITECTURE 审中-公开
    数字无线电频率传输架构的时间映射和/或累积要素

    公开(公告)号:US20140146797A1

    公开(公告)日:2014-05-29

    申请号:US14090135

    申请日:2013-11-26

    CPC classification number: H04L5/0085 H04J3/04 H04J3/16 H04W72/12

    Abstract: A serial link interface unit includes serialized data stream interfaces configured to receive a serialized data stream having a data rate and set of timeslots; an aggregate serialized data stream interface configured to communicate an aggregate serialized data stream having aggregate data rate and plurality of aggregate timeslot sets each coming sequentially in time, wherein a second aggregate timeslot set comes after a first aggregate timeslot set; and wherein the serial link interface unit interleaves data from the different serialized data streams received at the plurality of first interfaces by mapping data from a first timeslot from each different serialized data stream to the first aggregate timeslot set in the aggregate serialized data stream and mapping data from a second timeslot from each different serialized data stream to the second aggregate timeslot set in the aggregate serialized data stream.

    Abstract translation: 串行链路接口单元包括被配置为接收具有数据速率和时隙集合的串行数据流的串行数据流接口; 聚合序列化数据流接口,被配置为传送具有聚合数据速率和多个聚合时隙集合的聚合序列化数据流,每个聚合时隙集合在时间上顺序地进行,其中第二聚合时隙集合在第一聚合时隙集合之后; 并且其中所述串行链路接口单元通过将来自每个不同序列化数据流的第一时隙的数据映射到所述聚合序列化数据流中设置的所述第一聚合时隙并映射数据,从而在所述多个第一接口处接收的不同序列化数据流中的数据进行交织 从第二时隙从每个不同的序列化数据流到在聚合序列化数据流中设置的第二聚合时隙。

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