公开(公告)号：US20140047200A1

公开(公告)日：2014-02-13

申请号：US14055144

申请日：2013-10-16

Applicant: Apple Inc.

Inventor： Ori Isachar ,  Julian Vlaiko ,  Gil Semo ,  Atai Levy

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F1/3225 ,  G06F3/0604 ,  G06F3/0683

Abstract: A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Abstract translation: 存储器件包括多个存储器单元，令牌输入接口，令牌输出接口和控制电路。 控制电路被配置为接受存储命令，以在令牌输入接口上存在令牌脉冲的情况下调节存储命令的至少一部分的执行，以在存储器中执行包括调节部分的存储命令 在令牌输入接口上接收到令牌脉冲，并且在完成执行时在令牌输出接口上再现令牌脉冲。