Method and software tool for analyzing and reducing the failure rate of an integrated circuit
    11.
    发明授权
    Method and software tool for analyzing and reducing the failure rate of an integrated circuit 有权
    用于分析和降低集成电路故障率的方法和软件工具

    公开(公告)号:US08650527B2

    公开(公告)日:2014-02-11

    申请号:US13663755

    申请日:2012-10-30

    Applicant: Apple Inc.

    CPC classification number: G06F17/5036

    Abstract: A software tool and method for analyzing the reliability or failure rate of an integrated circuit (IC) are disclosed. The IC may include a plurality of circuit designs, and the software tool and method may aid a designer of the IC in determining a reliability rating of the IC based on reliability ratings of transistors or other circuit devices used in the circuit designs. In particular, the IC may include one or more circuit designs that have multiple instances within the IC (i.e., the same circuit design is instantiated multiple times), and the software tool and method may take into account the multiple instances when determining the reliability rating of the IC.

    Abstract translation: 公开了一种用于分析集成电路(IC)的可靠性或故障率的软件工具和方法。 IC可以包括多个电路设计,并且该软件工具和方法可以帮助IC的设计者基于在电路设计中使用的晶体管或其它电路器件的可靠性等级来确定IC的可靠性等级。 特别地,IC可以包括在IC内具有多个实例的一个或多个电路设计(即,相同的电路设计被实例化多次),并且当确定可靠性等级时,软件工具和方法可以考虑多个实例 的IC。

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