Abstract:
A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal.
Abstract:
An image sensor pixel is disclosed. The pixel may include a photodiode having a first region with a first potential and a second region with a second, higher potential, with the second region being offset in depth from the first region in a semiconductor chip. A storage node may be positioned at substantially the same depth as the second region of the photodiode. A storage gate may be operable to transfer charge between the photodiode and the storage node.
Abstract:
Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node.
Abstract:
Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node.