Array substrate for digital X-ray detector, and digital X-ray detector including the same

    公开(公告)号:US12133015B2

    公开(公告)日:2024-10-29

    申请号:US17542574

    申请日:2021-12-06

    IPC分类号: H04N5/32 H01L27/146

    摘要: A digital X-ray detector includes a width of a data line or a gate line extending across a dummy pixel area is smaller than a width of the data line or the gate line extending across an active area, a width of a dummy gate line or a dummy data line extending across the dummy pixel area is smaller than a width of the gate line or the data line extending across the active area, so that static electricity generated during a manufacturing process does not randomly flow into the active area, but rather flows into the dummy pixel area having the lowest capacitance, and the static electricity may be guided not to the active area but to the dummy gate line or dummy data line in the dummy pixel area, thereby minimizing line defects or block luminance deviation defects caused by the static electricity generated during the manufacturing process.

    Solid-state imaging device and electronic apparatus

    公开(公告)号:US12117538B2

    公开(公告)日:2024-10-15

    申请号:US17274519

    申请日:2019-09-09

    摘要: A solid-state imaging device according to an embodiment of the present disclosure includes a light receiving surface, and two or more pixels opposed to the light receiving surface. Each of the pixels includes a photoelectric conversion section that performs photoelectric conversion on light entering via the light receiving surface, a first charge holding section that holds a charge transferred from the photoelectric conversion section, and a second charge holding section disposed at a position where all or a portion thereof overlaps the first charge holding section in a planar layout, and formed to have no electrical continuity to the first charge holding section. Each of the pixels further includes a first transfer transistor that transfers the charge held by the first charge holding section to a floating diffusion, and a second transfer transistor that transfers a charge held by the second charge holding section to the floating diffusion.

    Photodetector
    4.
    发明授权

    公开(公告)号:US12113078B2

    公开(公告)日:2024-10-08

    申请号:US17479835

    申请日:2021-09-20

    IPC分类号: H01L27/146 H04N25/75

    摘要: A photodetector includes: a semiconductor substrate having a first main surface and a second main surface; a first semiconductor layer that is of a first conductivity type, and is included in the semiconductor substrate and closer to the first main surface than to the second main surface; a second semiconductor layer that is of a second conductivity type different from the first conductivity type, and is included in the semiconductor substrate and interposed between the first semiconductor layer and the second main surface; a multiplication region that causes avalanche multiplication to a charge generated in the semiconductor substrate through photoelectric conversion; a circuit region disposed alongside the first semiconductor layer in a direction parallel to the first main surface; at least one isolation transistor disposed in the circuit region; and an isolation region interposed between the first semiconductor layer and the circuit region.

    Photodetector
    8.
    发明授权

    公开(公告)号:US12080733B2

    公开(公告)日:2024-09-03

    申请号:US17026864

    申请日:2020-09-21

    IPC分类号: H01L27/146 H01L31/107

    摘要: A solid-state imaging device includes: a p-type semiconductor substrate; an n-type first semiconductor layer located above the semiconductor substrate and forming a junction with the semiconductor substrate in the first area; and an n-type second semiconductor layer located between the semiconductor substrate and the first semiconductor layer in the second area outward of the first area and having an impurity concentration lower than an impurity concentration of the first semiconductor layer. The semiconductor substrate and the first semiconductor layer form APD1, and the second semiconductor layer extends to a level below an interface between the semiconductor substrate and the first semiconductor layer in a thickness direction of the semiconductor substrate.