公开(公告)号：US12273977B2

公开(公告)日：2025-04-08

申请号：US18338916

申请日：2023-06-21

Applicant: Apple Inc.

Inventor： Cristian Grecu ,  Nicola Rasera ,  Bogdan-Eugen Matei ,  Fabio Ongaro

IPC: H05B45/30 ,  G05F1/575 ,  H03M7/16 ,  H05B45/34 ,  H05B45/397

Abstract: A high current, low dropout driver circuit is disclosed. The circuit includes a decoder configured to decode a plurality of control bits to generate a plurality of control signals, and a current source having a plurality of devices. The current source is configured to activate at least a subset of the plurality of devices using the control signals to provide a load current to a load circuit, such as a light-emitting diode (LED), using activated ones of the plurality of devices and a control voltage. A control circuit is configured to generate the control voltage based on the load current and a reference current.

公开(公告)号：US20240431001A1

公开(公告)日：2024-12-26

申请号：US18338916

申请日：2023-06-21

Applicant: Apple Inc.

Inventor： Cristian Grecu ,  Nicola Rasera ,  Bogdan-Eugen Matei ,  Fabio Ongaro

IPC: H05B45/397 ,  G05F1/575 ,  H05B45/34

Abstract: A high current, low dropout driver circuit is disclosed. The circuit includes a decoder configured to decode a plurality of control bits to generate a plurality of control signals, and a current source having a plurality of devices. The current source is configured to activate at least a subset of the plurality of devices using the control signals to provide a load current to a load circuit, such as a light-emitting diode (LED), using activated ones of the plurality of devices and a control voltage. A control circuit is configured to generate the control voltage based on the load current and a reference current.

公开(公告)号：US12155304B2

公开(公告)日：2024-11-26

申请号：US17931088

申请日：2022-09-09

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Nicola Rasera ,  Nikola Jovanovic

IPC: H02M3/158

Abstract: A multi-level power converter circuit for computer systems maintains phase alignment with other power converter circuits by employing low-gain phase-locked loop circuits. In order to account for different voltage levels on its terminal nodes, the power converter circuit may perform a comparison of the respective voltage levels of its terminal nodes. Using results of the comparison, the power converter circuit can select different regulation modes using different ones of the low-gain phase-locked loop circuits.

公开(公告)号：US20240106328A1

公开(公告)日：2024-03-28

申请号：US17934398

申请日：2022-09-22

Applicant: Apple Inc.

Inventor： Andrea Acquas ,  Angelo Bassi ,  Federico Rossini ,  Nicola Rasera

IPC: H02M3/158 ,  H02M1/00 ,  H03L7/089

CPC classification number: H02M3/158 ,  H02M1/0009 ,  H03L7/0891

Abstract: A phase-locked loop (PLL)-based power converter is disclosed. A power converter includes a switch circuit having a switch node coupled to a regulated power supply node via an inductor and configured to source a supply current to the regulated power supply node using one or more control signals. A control circuit performs a phase-frequency comparison of a reference clock signal and a switching frequency of the switch circuit and generate a control voltage using results of the phase-frequency comparison. The control circuit further generates a control current using the control voltage, a voltage of the regulated power supply node, and a duty cycle of the switch circuit, and a demand current using the voltage level of the regulated power supply node and a reference voltage. Using the demand current, the control current, and a sensed version of the supply current, the control circuit generates the one or more control signals.

公开(公告)号：US20220345040A1

公开(公告)日：2022-10-27

申请号：US17242012

申请日：2021-04-27

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Nicola Rasera ,  Nikola Jovanovic ,  Pietro Gabriele Gambetta

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/08

Abstract: A hysteretic current control switching power converter with a clock-controlled switching frequency is disclosed. A power converter includes a switching circuit including a high side switch and a low side switch coupled to one another at a switching node, with an inductor being coupled between the switching node and a regulated supply voltage node. The power converter further includes a control circuit configured to alternately cause activation of the high side switch and the low side switch, wherein the control circuit is configured to activate the low side switch in response to a first voltage reaching peak threshold value, the first voltage corresponding to a current through the inductor. A ramp voltage circuit is configured to, in response to a clock signal, generate a ramp voltage, wherein the peak threshold value is based on the ramp voltage.

公开(公告)号：US11086378B1

公开(公告)日：2021-08-10

申请号：US16784605

申请日：2020-02-07

Applicant: Apple Inc.

Inventor： Michael Couleur ,  Nicola Rasera ,  Siarhei Meliukh

IPC: H02M3/158 ,  G06F1/28

Abstract: A power converter circuit that includes a switch circuit, and multiple phase and amplifier circuits, may generate a voltage level on a regulated power supply node of a computer system. The amplifier circuits may generate respective demand currents using a voltage level of the regulated power supply node and a reference voltage. In response to activation of a multi-phase operating mode, the switch circuit may short the outputs of the amplifier circuits to generate a common demand current. The multiple phase circuits may sequentially source current to regulated power supply node using the common demand current.