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公开(公告)号：US20210153320A1
公开(公告)日：2021-05-20
申请号：US16908425
申请日：2020-06-22
Applicant: Apple Inc.
Inventor： Cristian Grecu , Bogdan-Eugen Matei , Angelo Bassi , Andrei-Cosmin Gaidam , Alessandro Molari
Abstract: An LED driver circuit is disclosed. The LED driver circuit includes an amplifier having a first input coupled to receive a reference voltage and a second input coupled to receive a feedback voltage. The circuit further includes first and second transistors each having respective gate terminals coupled to an output of the first amplifier. In a first mode, a first switch alternately couples a source terminal of the first transistor to the second input of the amplifier (when the pulse is asserted) and a source terminal of the second transistor to the second input (when the pulse is de-asserted). A third transistor includes a gate terminal that is coupled to ground, by a second switch, when operating in the first mode. When operating in the second mode, the switch couples the third transistor to the output of the amplifier, while the pulse remains asserted.
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公开(公告)号：US12111676B2
公开(公告)日：2024-10-08
申请号：US17947465
申请日：2022-09-19
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Angelo Bassi
IPC: G05F3/26
CPC classification number: G05F3/265
Abstract: A bandgap circuit that is area efficient and has a low power consumption. The bandgap circuit includes a voltage generator circuit, and a sample and hold circuit coupled to the voltage generator circuit. The voltage generator circuit includes a pair of transistors each connected in a diode configuration and biased with a respective current source of a plurality of current sources of the voltage generator circuit. During a sample phase, the sample and hold circuit samples a first voltage between a first base and a first emitter of a first transistor of the pair of transistors and a second voltage between a second base and a second emitter of a second transistor of the pair of transistors. During a hold phase subsequent to the sample phase, the sample and hold circuit generates an output voltage as a combination of the sampled first and second voltages.
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公开(公告)号：US11178742B1
公开(公告)日：2021-11-16
申请号：US16930021
申请日：2020-07-15
Applicant: Apple Inc.
Inventor： Angelo Bassi , Bogdan-Eugen Matei
Abstract: A minimum voltage detector circuit is disclosed. The circuit includes a plurality of LED strings each having a plurality of series-coupled LEDs. The minimum voltage detector circuit is configured to detect a minimum voltage from among the plurality of LED strings, and also to perform open/short detection among the plurality of LED strings. The minimum voltage detector circuit includes a plurality of voltage comparators and correspondingly coupled replica circuits. Each of the voltage comparators includes an amplifier having a first input coupled to a cathode of a last LED of one of the plurality of LED strings, an output, and a second input coupled to the output. Each voltage comparator further includes a replica circuit coupled to the amplifier. The replica circuit is configured to maintain an output transistor of the amplifier in an active state when the amplifier is in an unbalanced state.
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公开(公告)号：US20240106328A1
公开(公告)日：2024-03-28
申请号：US17934398
申请日：2022-09-22
Applicant: Apple Inc.
Inventor： Andrea Acquas , Angelo Bassi , Federico Rossini , Nicola Rasera
CPC classification number: H02M3/158 , H02M1/0009 , H03L7/0891
Abstract: A phase-locked loop (PLL)-based power converter is disclosed. A power converter includes a switch circuit having a switch node coupled to a regulated power supply node via an inductor and configured to source a supply current to the regulated power supply node using one or more control signals. A control circuit performs a phase-frequency comparison of a reference clock signal and a switching frequency of the switch circuit and generate a control voltage using results of the phase-frequency comparison. The control circuit further generates a control current using the control voltage, a voltage of the regulated power supply node, and a duty cycle of the switch circuit, and a demand current using the voltage level of the regulated power supply node and a reference voltage. Using the demand current, the control current, and a sensed version of the supply current, the control circuit generates the one or more control signals.
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公开(公告)号：US11166355B2
公开(公告)日：2021-11-02
申请号：US16908425
申请日：2020-06-22
Applicant: Apple Inc.
Inventor： Cristian Grecu , Bogdan-Eugen Matei , Angelo Bassi , Andrei-Cosmin Gaidam , Alessandro Molari
Abstract: An LED driver circuit is disclosed. The LED driver circuit includes an amplifier having a first input coupled to receive a reference voltage and a second input coupled to receive a feedback voltage. The circuit further includes first and second transistors each having respective gate terminals coupled to an output of the first amplifier. In a first mode, a first switch alternately couples a source terminal of the first transistor to the second input of the amplifier (when the pulse is asserted) and a source terminal of the second transistor to the second input (when the pulse is de-asserted). A third transistor includes a gate terminal that is coupled to ground, by a second switch, when operating in the first mode. When operating in the second mode, the switch couples the third transistor to the output of the amplifier, while the pulse remains asserted.
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Patent Agency Ranking
公开(公告)号：US20240103557A1
公开(公告)日：2024-03-28
申请号：US17947465
申请日：2022-09-19
Applicant: Apple Inc.
Inventor： Giulio Maria Iadicicco , Angelo Bassi
IPC: G05F3/26
CPC classification number: G05F3/265
Abstract: A bandgap circuit that is area efficient and has a low power consumption. The bandgap circuit includes a voltage generator circuit, and a sample and hold circuit coupled to the voltage generator circuit. The voltage generator circuit includes a pair of transistors each connected in a diode configuration and biased with a respective current source of a plurality of current sources of the voltage generator circuit. During a sample phase, the sample and hold circuit samples a first voltage between a first base and a first emitter of a first transistor of the pair of transistors and a second voltage between a second base and a second emitter of a second transistor of the pair of transistors. During a hold phase subsequent to the sample phase, the sample and hold circuit generates an output voltage as a combination of the sampled first and second voltages.
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公开(公告)号：US20220151043A1
公开(公告)日：2022-05-12
申请号：US17454939
申请日：2021-11-15
Applicant: Apple Inc.
Inventor： Angelo Bassi , Bogdan-Eugen Matei
Abstract: A minimum voltage detector circuit is disclosed. The circuit includes a plurality of LED strings each having a plurality of series-coupled LEDs. The minimum voltage detector circuit is configured to detect a minimum voltage from among the plurality of LED strings, and also to perform open/short detection among the plurality of LED strings. The minimum voltage detector circuit includes a plurality of voltage comparators and correspondingly coupled replica circuits. Each of the voltage comparators includes an amplifier having a first input coupled to a cathode of a last LED of one of the plurality of LED strings, an output, and a second input coupled to the output. Each voltage comparator further includes a replica circuit coupled to the amplifier. The replica circuit is configured to maintain an output transistor of the amplifier in an active state when the amplifier is in an unbalanced state.
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公开(公告)号：US11152846B2
公开(公告)日：2021-10-19
申请号：US16743443
申请日：2020-01-15
Applicant: Apple Inc.
Inventor： Bogdan-Eugen Matei , Alessandro S. Molari , Angelo Bassi , Fabio Ongaro , Giovanni Saccomanno
Abstract: A DC-DC converter providing adaptive peak current control is disclosed. A DC-DC converter includes an inductor having first and second terminals coupled to a voltage source and a transistor, respectively. The DC-DC circuit further includes a control circuit configured to control activation of the transistor. A first control block of the control circuit controls the transistor (and thus the inductor peak current) using pulse frequency modulation (PFM). A second control block controls the transistor using pulse width modulation (PWM) and PFM. In a first mode of operation, the control circuit activates the transistor, using PFM, such that the peak-to-peak current through the inductor has a fixed value. In a second mode of operation, the control circuit activates the transistor such that the peak-to-peak current through the inductor is modulated, using both PWM and PFM.
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公开(公告)号：US11653433B2
公开(公告)日：2023-05-16
申请号：US17454939
申请日：2021-11-15
Applicant: Apple Inc.
Inventor： Angelo Bassi , Bogdan-Eugen Matei
CPC classification number: H05B45/54 , G01R31/2635 , G01R31/52 , H05B45/38
Abstract: A minimum voltage detector circuit is disclosed. The circuit includes a plurality of LED strings each having a plurality of series-coupled LEDs. The minimum voltage detector circuit is configured to detect a minimum voltage from among the plurality of LED strings, and also to perform open/short detection among the plurality of LED strings. The minimum voltage detector circuit includes a plurality of voltage comparators and correspondingly coupled replica circuits. Each of the voltage comparators includes an amplifier having a first input coupled to a cathode of a last LED of one of the plurality of LED strings, an output, and a second input coupled to the output. Each voltage comparator further includes a replica circuit coupled to the amplifier. The replica circuit is configured to maintain an output transistor of the amplifier in an active state when the amplifier is in an unbalanced state.
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公开(公告)号：US20210218343A1
公开(公告)日：2021-07-15
申请号：US16743443
申请日：2020-01-15
Applicant: Apple Inc.
Inventor： Bogdan-Eugen Matei , Alessandro S. Molari , Angelo Bassi , Fabio Ongaro , Giovanni Saccomanno
Abstract: A DC-DC converter providing adaptive peak current control is disclosed. A DC-DC converter includes an inductor having first and second terminals coupled to a voltage source and a transistor, respectively. The DC-DC circuit further includes a control circuit configured to control activation of the transistor. A first control block of the control circuit controls the transistor (and thus the inductor peak current) using pulse frequency modulation (PFM). A second control block controls the transistor using pulse width modulation (PWM) and PFM. In a first mode of operation, the control circuit activates the transistor, using PFM, such that the peak-to-peak current through the inductor has a fixed value. In a second mode of operation, the control circuit activates the transistor such that the peak-to-peak current through the inductor is modulated, using both PWM and PFM.
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