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52 条记录 (耗时 0.029 秒)

    Cutlery dispenser and method of dispensing cutlery
    11.
    发明授权
    Cutlery dispenser and method of dispensing cutlery 有权
    餐具分配器和分配餐具的方法

    公开(公告)号：US08297473B2

    公开(公告)日：2012-10-30

    申请号：US11936401

    申请日：2007-11-07

    申请人： Patrick J. Smith

    发明人： Patrick J. Smith

    IPC分类号： A47F1/08

    CPC分类号： A47F1/10

    摘要： A cutlery dispenser comprises a storage chamber adapted to retain a plurality of cutlery therein; an ejector for sequentially ejecting the plurality of cutlery from the storage chamber; an actuator for driving the ejector; and a sensor for triggering the actuator in response to an event.

    摘要翻译： 餐具分配器包括适于将多个餐具保持在其中的储存室; 用于从所述存储室顺序地排出所述多个餐具的喷射器; 用于驱动喷射器的致动器; 以及用于响应于事件触发致动器的传感器。

    DRYWALL LIFT
    13.
    发明申请
    DRYWALL LIFT 审中-公开
    干燥器提升

    公开(公告)号：US20100202859A1

    公开(公告)日：2010-08-12

    申请号：US12702662

    申请日：2010-02-09

    申请人： Patrick J. Smith

    发明人： Patrick J. Smith

    IPC分类号： E04G21/14 ,  E04G21/18

    CPC分类号： E04F21/1894

    摘要： A foot-actuated lifter for drywall sheets comprises a base with a rocker between a foot-engaged toe. The device can be locked in any of several height positions.

    摘要翻译： 用于干墙板的脚踏式升降机包括具有在脚部接合的脚趾之间的摇杆的底座。 该设备可以锁定在几个高度位置中的任何一个。

    Apparatus and method for a sorting mode in a direct memory access controller of a digital signal processor
    14.
    发明授权
    Apparatus and method for a sorting mode in a direct memory access controller of a digital signal processor 有权
    数字信号处理器的直接存储器存取控制器中的排序模式的装置和方法

    公开(公告)号：US06715058B1

    公开(公告)日：2004-03-30

    申请号：US09670667

    申请日：2000-09-27

    申请人： Patrick J. Smith ,  Tai H. Nguyen

    发明人： Patrick J. Smith ,  Tai H. Nguyen

    IPC分类号： G06F1202

    CPC分类号： G06F13/28

    摘要： In order to sort signal group elements organized in blocks in a time-division multiplex protocol into frames of related elements, an address unit addresses the first element in each of the element blocks, then the second element in each element block, etc until all of the elements of all of the blocks have been addressed. In this manner, the related elements are sorted into frames of elements. The address unit performs this element sorting using a base address, an element index equal to the number of elements in a block, and a frame index equal to {the number of elements times (the number of frames minus one)} minus one as parameters.

    摘要翻译： 为了将以时分多路复用协议的块中组织的信号组元素分类为相关元素的帧，地址单元寻址每个元素块中的第一元素，然后寻址每个元素块中的第二元素等，直到全部 所有块的要素已被解决。 以这种方式，相关元素被分类成元素的框架。 地址单元使用基地址执行该元素排序，元素索引等于块中的元素的数量，以及等于{元素数量（帧数减1））的帧索引减去一个作为参数 。

    Channelized binary-level hop rate detector
    15.
    发明授权
    Channelized binary-level hop rate detector 失效
    信道化二进制跳频率检测器

    公开(公告)号：US4942589A

    公开(公告)日：1990-07-17

    申请号：US417175

    申请日：1989-10-04

    申请人： Patrick J. Smith ,  Ronald S. Leahy ,  Scott R. Bullock

    发明人： Patrick J. Smith ,  Ronald S. Leahy ,  Scott R. Bullock

    IPC分类号： H04B1/713 ,  H04B1/715

    CPC分类号： H04B1/715 ,  H04B1/713 ,  H04B2001/7154

    摘要： A hop rate detector, for receiving frequency-hopped signals carrying information data, which generates a tone at the "hop rate" when modulated or unmodulated frequency-hopped signals are present. The input signal is channelized into sub-bands via filter banks and the signal in each channel is power detected (squared) and compared to a present threshold to produce a positive voltage (="1") if the threshold is exceeded and zero volts (="0") otherwise. The channel signals are split into an upper band (B.sub.u) and lower band (B.sub.d), then each band is summed and the lower band sum subtracted from the upper band sum to provide a first stage signal. The first stage signal has its DC component removed, then is multiplied by a delayed copy of itself to provide a frequency tone indicating the hop rate of the received signal.

    摘要翻译： 一种跳频检测器，用于接收携带信息数据的跳频信号，当出现调制或未调制的跳频信号时产生“跳频”的音调。 输入信号通过滤波器组通道化为子带，并且每个通道中的信号被功率检测（平方），并与当前阈值进行比较，以产生正电压（=“1”），如果超过阈值和零伏（ =“0”）否则。 信道信号被分成高频带（Bu）和低频带（Bd），然后将每个频带相加，并从较高频带和减去较低频带和以提供第一级信号。 第一级信号除去其直流分量，然后乘以本身的延迟副本，以提供指示接收信号的跳频的频率音调。

    Digital adaptive filter for a high throughput digital adaptive processor
    16.
    发明授权
    Digital adaptive filter for a high throughput digital adaptive processor 失效
    用于高通量数字自适应处理器的数字自适应滤波器

    公开(公告)号：US4726036A

    公开(公告)日：1988-02-16

    申请号：US030302

    申请日：1987-03-26

    申请人： Laurence D. Sawyer ,  Patrick J. Smith

    发明人： Laurence D. Sawyer ,  Patrick J. Smith

    IPC分类号： H03H21/00 ,  H03H17/02 ,  H03H17/04 ,  H04B3/04 ,  H04B3/14

    CPC分类号： H03H21/0012

    摘要： The weights of least mean square (LMS) adaptive filter are updated with a different set of taps than are used to form the output of the adaptive filter in the adaptive processing device of the present invention. As a result of performing the multiplications and sums required for the filter operation simultaneously, an integral number of clock cycle delays appear in the narrowband and error feedback channels. The number of taps of the tapped delay line of the invention are increased, whereby the increased delay through the delay line may be used to compensate for a delay through the filter of an integral number of clock delay cycles. Instantaneous weight updating in accordance with the signal being utilized, may then be achieved at a clock rate frequency that is ten times or more greater than prior art adaptive filters.

    摘要翻译： 用本发明的自适应处理装置中用于形成自适应滤波器的输出的不同抽头集合来更新最小均方（LMS）自适应滤波器的权重。 作为同时执行滤波器操作所需的乘法和和的结果，在窄带和误差反馈信道中出现整数个时钟周期延迟。 本发明的抽头延迟线的抽头数量增加，由此通过延迟线的增加的延迟可以用于补偿通过整数倍的时钟延迟周期的滤波器的延迟。 然后可以以比现有技术的自适应滤波器大十倍或更多的时钟速率频率来实现根据所使用的信号的瞬时权重更新。

    Analog/digital adaptive line enhancer
    17.
    发明授权
    Analog/digital adaptive line enhancer 失效
    模拟/数字自适应线增强器

    公开(公告)号：US4726035A

    公开(公告)日：1988-02-16

    申请号：US30301

    申请日：1987-03-26

    申请人： Scott R. Bullock ,  Patrick J. Smith

    发明人： Scott R. Bullock ,  Patrick J. Smith

    IPC分类号： H04B3/06 ,  H03H17/00 ,  H03H17/02 ,  H03H21/00 ,  H04B3/14

    CPC分类号： H03H21/0001

    摘要： The reference channel, the narrowband channel, and the error feedback channel are all constructed with analog components, while the adaptive processor is constructed with digital components. Unavoidable analog time delays in the narrowband and the error feedback channels are compensated for in the digital adaptive processor. The adaptive line enhancer described herein employs a local oscillator signal which is mixed with the input signal in a reference channel, which is subsequently converted to a digital signal. A digitized reference signal is supplied to an adaptive filter as an input signal. The adjustable weight values of the adaptive filter are adjusted by a feedback digitized signal. The output signal is derived from the subtraction of a narrowband analog signal, which is derived from the adaptive filter. The error feedback signal is split off of the output signal, mixed with the local oscillator signal, and supplied to the weight update mechanisms.

    摘要翻译： 参考通道，窄带通道和误差反馈通道均采用模拟元件构成，而自适应处理器则由数字元件构成。 在数字自适应处理器中补偿窄带和误差反馈信道中的不可避免的模拟时间延迟。 本文描述的自适应线增强器采用本地振荡器信号，其在参考通道中与输入信号混合，随后将其转换为数字信号。 数字化参考信号作为输入信号提供给自适应滤波器。 自适应滤波器的可调重量值由反馈数字化信号调整。 输出信号是从相应的滤波器导出的窄带模拟信号的减法得出的。 误差反馈信号与输出信号分离，与本地振荡器信号混合，并提供给加权更新机制。

    Cutlery Dispenser and Method of Dispensing Cutlery
    18.
    发明申请
    Cutlery Dispenser and Method of Dispensing Cutlery 有权
    餐具分配器及餐具分配方法

    公开(公告)号：US20150001235A9

    公开(公告)日：2015-01-01

    申请号：US13663345

    申请日：2012-10-29

    申请人： Patrick J. Smith

    发明人： Patrick J. Smith

    IPC分类号： A47F1/10

    CPC分类号： A47F1/10 ,  A47F2001/103

    摘要： A cutlery dispenser comprises a storage chamber adapted to retain a plurality of cutlery therein; an ejector for sequentially ejecting the plurality of cutlery from the storage chamber; an actuator for driving the ejector; and a sensor for triggering the actuator in response to an event.

    摘要翻译： 餐具分配器包括适于将多个餐具保持在其中的储存室; 用于从所述存储室顺序地排出所述多个餐具的喷射器; 用于驱动喷射器的致动器; 以及用于响应于事件触发致动器的传感器。