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公开(公告)号：US10969885B2
公开(公告)日：2021-04-06
申请号：US16485821
申请日：2018-08-03
发明人： Xiaona Liu , Yuqiong Chen , Mengjie Wang , Shuai Yuan , Chenchen Wu , Ning Li , Ziyi Zheng
IPC分类号： G06F3/041 , G02F1/1335 , G02F1/1333
摘要： An array substrate, a manufacturing method therefor, and a touch display panel are provided. The array substrate includes: a touch electrode, located on a base substrate and extending along a first direction; a pixel electrode, located on the base substrate, insulated from the touch electrode and including opposing outer edges, the outer edges being sequentially arranged along a second direction. In the second direction, the orthographic projection of the touch electrode on the base substrate is located between the orthographic projections of the outer edges of the pixel electrode on the base substrate. The array substrate prevents or reduces differences between coupling capacitances between the pixel electrode and signal lines on two sides thereof.
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公开(公告)号：US20190079617A1
公开(公告)日：2019-03-14
申请号：US16006827
申请日：2018-06-12
发明人： Ning Li , Xiaona Liu , Peng Jia , Chenchen Wu , Yuqiong Chen , Mengjie Wang , Shuai Yuan , Ziyi Zheng
IPC分类号： G06F3/041 , G02F1/1333 , G02F1/1335 , G02F1/1339 , G02F1/1345
摘要： A color filter substrate, a display panel and a display device are provided. The color filter substrate includes: a base substrate; a black matrix on a side of the base substrate; an insulation layer on a side of the black matrix away from the base substrate; and a touch routing line between the black matrix and the insulation layer, wherein an orthogonal projection of the black matrix on the base substrate covers an orthogonal projection of the touch routing line on the base substrate.
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公开(公告)号：US09793303B2
公开(公告)日：2017-10-17
申请号：US15140723
申请日：2016-04-28
发明人： Junlin Peng , Shuai Yuan , Ming Huang , Lilu Zhao , Feng Xu
IPC分类号： H01L27/12 , H01L21/308 , H01L29/417
摘要： The present disclosure provides an array substrate and a method of manufacturing the same, and a display panel comprising the array substrate, for reducing a drop or height difference between surfaces of portions of a passivation layer located on either side of a source/drain electrode lead wire and a surface of a portion of passivation layer located on an upper surface of the source/drain electrode lead wire so as to increase an aperture ratio of the display panel. The method comprises: forming a source/drain electrode lead wire and a passivation layer successively on a base substrate, the passivation layer at least covering the source/drain electrode lead wire; and thinning a portion of the passivation layer located on the source/drain electrode lead wire such that a surface of the portion is higher than those of other portions of the passivation layer, at the time of patterning the passivation layer to form a via hole therein.
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公开(公告)号：US20170092665A1
公开(公告)日：2017-03-30
申请号：US15140723
申请日：2016-04-28
发明人： Junlin Peng , Shuai Yuan , Ming Huang , Lilu Zhao , Feng Xu
IPC分类号： H01L27/12 , H01L29/417 , H01L21/308
CPC分类号： H01L27/1288 , H01L21/3085 , H01L27/124 , H01L27/1248 , H01L29/41733
摘要： The present disclosure provides an array substrate and a method of manufacturing the same, and a display panel comprising the array substrate, for reducing a drop or height difference between surfaces of portions of a passivation layer located on either side of a source/drain electrode lead wire and a surface of a portion of passivation layer located on an upper surface of the source/drain electrode lead wire so as to increase an aperture ratio of the display panel. The method comprises: forming a source/drain electrode lead wire and a passivation layer successively on a base substrate, the passivation layer at least covering the source/drain electrode lead wire; and thinning a portion of the passivation layer located on the source/drain electrode lead wire such that a surface of the portion is higher than those of other portions of the passivation layer, at the time of patterning the passivation layer to form a via hole therein.
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公开(公告)号：US09842867B2
公开(公告)日：2017-12-12
申请号：US15140723
申请日：2016-04-28
发明人： Junlin Peng , Shuai Yuan , Ming Huang , Lilu Zhao , Feng Xu
IPC分类号： H01L27/12 , H01L21/308 , H01L29/417
CPC分类号： H01L27/1288 , H01L21/3085 , H01L27/124 , H01L27/1248 , H01L29/41733
摘要： The present disclosure provides an array substrate and a method of manufacturing the same, and a display panel comprising the array substrate, for reducing a drop or height difference between surfaces of portions of a passivation layer located on either side of a source/drain electrode lead wire and a surface of a portion of passivation layer located on an upper surface of the source/drain electrode lead wire so as to increase an aperture ratio of the display panel. The method comprises: forming a source/drain electrode lead wire and a passivation layer successively on a base substrate, the passivation layer at least covering the source/drain electrode lead wire; and thinning a portion of the passivation layer located on the source/drain electrode lead wire such that a surface of the portion is higher than those of other portions of the passivation layer, at the time of patterning the passivation layer to form a via hole therein.
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