公开(公告)号：US10700107B2

公开(公告)日：2020-06-30

申请号：US15781327

申请日：2017-10-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong He ,  Zhifu Li ,  Guangcai Yuan ,  Haijiao Qian ,  Dongsheng Li

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/10 ,  H01L21/268 ,  H01L29/66 ,  H01L21/02

Abstract: It is provided a low-temperature polysilicon thin film transistor formed on a substrate, including: a gate electrode on the substrate; an active layer on the gate electrode, the active layer including a channel region, the channel region having a polysilicon region and amorphous silicon regions respectively on both sides of the polysilicon region; and an etch stop layer on the active layer. An orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the gate electrode on the substrate, and an area of the orthogonal projection the polysilicon region on the substrate is smaller than an area of the orthogonal projection of the gate electrode on the substrate. The orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the etch stop layer on the substrate.

公开(公告)号：US20190259879A1

公开(公告)日：2019-08-22

申请号：US15781327

申请日：2017-10-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaolong He ,  Zhifu Li ,  Guangcai Yuan ,  Haijiao Qian ,  Dongsheng Li

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02

Abstract: It is provided a low-temperature polysilicon thin film transistor formed on a substrate, including: a gate electrode on the substrate; an active layer on the gate electrode, the active layer including a channel region, the channel region having a polysilicon region and amorphous silicon regions respectively on both sides of the polysilicon region; and an etch stop layer on the active layer. An orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the gate electrode on the substrate, and an area of the orthogonal projection the polysilicon region on the substrate is smaller than an area of the orthogonal projection of the gate electrode on the substrate. The orthogonal projection of the polysilicon region on the substrate is located within an orthogonal projection of the etch stop layer on the substrate.