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17 条记录 (耗时 0.057 秒)

    Method of performing a call operation in a digital data processing system having microcode call and return operations
    12.
    发明授权
    Method of performing a call operation in a digital data processing system having microcode call and return operations 失效
    在具有微码呼叫和返回操作的数字数据处理系统中执行呼叫操作的方法

    公开(公告)号：US4493027A

    公开(公告)日：1985-01-08

    申请号：US266526

    申请日：1981-05-22

    申请人： Lawrence H. Katz ,  Douglas M. Wells ,  Michael S. Richmond ,  Richard A. Belgard ,  Walter A. Wallach, Jr. ,  David H. Bernstein ,  John K. Ahlstrom ,  John F. Pilat ,  David A. Farber ,  Richard G. Bratt

    发明人： Lawrence H. Katz ,  Douglas M. Wells ,  Michael S. Richmond ,  Richard A. Belgard ,  Walter A. Wallach, Jr. ,  David H. Bernstein ,  John K. Ahlstrom ,  John F. Pilat ,  David A. Farber ,  Richard G. Bratt

    IPC分类号： G06F9/40 ,  G06F3/00 ,  G06F9/22 ,  G06F9/36 ,  G06F9/46

    CPC分类号： G06F9/4425

    摘要： A method for executing call and return instructions in a digital computer system operating under control of microcode. The microcode may specify calls to and returns from sequences of microinstructions. A call microinstruction sequence corresponds to the call instruction. The call microcode in turn calls other microinstruction sequences for deriving pointers representing the location of the called procedure and of arguments from operands in the call instruction. As the call microcode obtains each argument pointer, it places the pointer on the stack. After it has obtained all of the argument pointers, it passes the pointer to the called procedure and a pointer to the argument pointers to a general call microinstruction sequence. That microinstruction sequence locates the called procedure, makes a new frame including the argument pointers, and saves the state necessary to resume execution of the call microinstruction sequence itself. It then obtains the state necessary to commence execution of the called procedure and causes execution of that procedure to commence. The microcode corresponding to the return instruction restores both the state necessary to resume execution of the calling procedure and the state necessary to resume execution of the call microinstruction sequence. When it resumes execution, the call microinstruction sequence completes the return operation.

    摘要翻译： 一种在微码控制下操作的数字计算机系统中执行呼叫和返回指令的方法。 微代码可以指定对微指令序列的调用和返回。 调用微指令序列对应于调用指令。 调用微代码又调用其他微指令序列来导出表示被调用过程的位置的指针，以及调用指令中操作数的参数。 当调用微代码获取每个参数指针时，它将指针放在堆栈上。 在获取所有参数指针之后，它将指针传递给被调用的过程，并将指针指向一般调用微指令序列。 该微指令序列定位被调用的过程，创建一个包含参数指针的新帧，并保存恢复执行调用微指令序列本身所需的状态。 然后获得开始执行被叫程序所必需的状态，并使该程序的执行开始。 对应于返回指令的微代码恢复恢复执行调用过程所需的状态和继续执行调用微指令序列所需的状态。 当它恢复执行时，调用微指令序列完成返回操作。

    Integral Lint Filter for Clothes Dryers
    13.
    发明申请
    Integral Lint Filter for Clothes Dryers 审中-公开
    干衣机整体绒布过滤器

    公开(公告)号：US20090133284A1

    公开(公告)日：2009-05-28

    申请号：US12363931

    申请日：2009-02-02

    申请人： Richard A. Belgard

    发明人： Richard A. Belgard

    IPC分类号： F26B3/02 ,  F26B21/06

    CPC分类号： D06F58/22

    摘要： A lint filter assembly for removing lint and particulate matter from a clothes dryer exhaust system includes a conduit adapter and a filtering element. In a preferred embodiment the lint filter is a secondary filter removably connected inline between conduits substantially at the point of communication of the exhaust gases through a wall or floor to the outside, the filter portion not exceeding the conduit size in diameter.

    摘要翻译： 用于从干衣机排气系统去除棉绒和颗粒物质的棉绒过滤器组件包括导管适配器和过滤元件。 在优选实施例中，棉绒过滤器是二次过滤器，其可拆卸地连接在管道之间，基本上在废气通过壁或地板到达外部的连通点处，过滤器部分的直径不超过管道尺寸。

    Integral lint filter for clothes dryers
    14.
    发明授权
    Integral lint filter for clothes dryers 失效
    用于干衣机的整体棉绒过滤器

    公开(公告)号：US07497030B2

    公开(公告)日：2009-03-03

    申请号：US11341400

    申请日：2006-01-26

    申请人： Richard A. Belgard

    发明人： Richard A. Belgard

    IPC分类号： F26B21/06

    CPC分类号： D06F58/22

    摘要： A lint filter assembly for removing lint and particulate matter from a clothes dryer exhaust system includes a conduit adapter and a filtering element. In a preferred embodiment the lint filter is a secondary filter removably connected inline between conduits substantially at the point of communication of the exhaust gases through a wall or floor to the outside, the filter portion not exceeding the conduit size in diameter.

    摘要翻译： 用于从干衣机排气系统去除棉绒和颗粒物质的棉绒过滤器组件包括导管适配器和过滤元件。 在优选实施例中，棉绒过滤器是二次过滤器，其可拆卸地连接在管道之间，基本上在废气通过壁或地板到达外部的连通点处，过滤器部分的直径不超过管道尺寸。

    Computer address translation using fast address generator during a segmentation operation performed on a virtual address
    15.
    发明授权
    Computer address translation using fast address generator during a segmentation operation performed on a virtual address 失效
    在虚拟地址执行分割操作期间使用快速地址生成器的计算机地址转换

    公开(公告)号：US5960466A

    公开(公告)日：1999-09-28

    申请号：US905410

    申请日：1997-08-04

    申请人： Richard A. Belgard

    发明人： Richard A. Belgard

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1036

    摘要： An improved address translation method and mechanism for memory management in a computer system is disclosed. A segmentation mechanism employing segment registers maps virtual addresses into a linear address space. A paging mechanism optionally maps linear addresses into physical or real addresses. Independent protection of address spaces is provided at each level. Information about the state of real memory pages is kept in segment registers or a segment register cache potentially enabling real memory access to occur simultaneously with address calculation, thereby increasing performance of the computer system.

    摘要翻译： 公开了一种用于计算机系统中的存储器管理的改进的地址转换方法和机制。 采用分段寄存器的分段机制将虚拟地址映射到线性地址空间。 寻呼机制可以将线性地址映射到物理地址或实际地址。 在各级提供地址空间的独立保护。 关于实际存储器页面的状态的信息被保存在段寄存器中，或者段缓存高速缓存潜在地使实际存储器访问与地址计算同时发生，从而提高计算机系统的性能。

    Address translation mechanism and method in a computer system
    16.
    发明授权
    Address translation mechanism and method in a computer system 失效
    计算机系统中的地址转换机制和方法

    公开(公告)号：US06226733B1

    公开(公告)日：2001-05-01

    申请号：US08905356

    申请日：1997-08-04

    申请人： Richard A. Belgard

    发明人： Richard A. Belgard

    IPC分类号： G06F1210

    CPC分类号： G06F12/1036

    摘要： An improved address translation method and mechanism for memory management in a computer system is disclosed. A fast physical address is generated in parallel with a fully computed virtual-linear-physical address in a system using segmentation and optional paging. This fast physical address is used for a tentative or speculative memory reference, which reference can be canceled in the event the fast physical address does not match the fully computed address counterpart. In this manner, memory references can be accelerated in a computer system by avoiding a conventional translation scheme requiring two separate and sequential address translation operations—i.e. from virtual to linear, and from linear to physical.

    摘要翻译： 公开了一种用于计算机系统中的存储器管理的改进的地址转换方法和机制。 在使用分段和可选分页的系统中，与完全计算的虚拟线性物理地址并行生成快速物理地址。 该快速物理地址用于暂定或推测的存储器引用，在快速物理地址与完全计算的地址对应不匹配的情况下，可以取消该引用。 以这种方式，可以通过避免需要两个单独和顺序的地址转换操作的常规翻译方案来在计算机系统中加速存储器引用。 从虚拟到线性，从线性到物理。

    Address translation method and mechanism using physical address information including during a segmentation process
    17.
    发明授权
    Address translation method and mechanism using physical address information including during a segmentation process 失效
    使用物理地址信息的地址转换方法和机制，包括在分割过程中

    公开(公告)号：US5895503A

    公开(公告)日：1999-04-20

    申请号：US458479

    申请日：1995-06-02

    申请人： Richard A. Belgard

    发明人： Richard A. Belgard

    IPC分类号： G06F12/10 ,  G06F12/06

    CPC分类号： G06F12/1036

    摘要： An improved address translation method and mechanism for memory management in a computer system is disclosed. A segmentation mechanism employing segment registers maps virtual addresses into a linear address space. A paging mechanism optionally maps linear addresses into physical or real addresses. Independent protection of address spaces is provided at each level. Information about the state of real memory pages is kept in segment registers or a segment register cache potentially enabling real memory access to occur simultaneously with address calculation, thereby increasing performance of the computer system.

    摘要翻译： 公开了一种用于计算机系统中的存储器管理的改进的地址转换方法和机制。 采用分段寄存器的分段机制将虚拟地址映射到线性地址空间。 寻呼机制可以将线性地址映射到物理地址或实际地址。 在各级提供地址空间的独立保护。 关于实际存储器页面的状态的信息被保存在段寄存器中，或者段缓存高速缓存潜在地使实际存储器访问与地址计算同时发生，从而提高计算机系统的性能。