公开(公告)号：US20130298070A1

公开(公告)日：2013-11-07

申请号：US13602299

申请日：2012-09-03

Applicant: Jer-Bin Lin ,  Che-Yu Lee ,  Chun-Lin Chen

Inventor： Jer-Bin Lin ,  Che-Yu Lee ,  Chun-Lin Chen

IPC: G06F3/048

CPC classification number: G06F3/0482 ,  G06F3/0483 ,  G06F3/04886

Abstract: A method for switching display interfaces includes a touch display device utilizing a first display interface for displaying open images of a plurality of data objects when being opened; touching a predetermined display area of the touch display device; and the touch display device switching the first display interface to a second display interface different from the first display interface for displaying the open images of the plurality of data objects when being opened.

Abstract translation: 一种用于切换显示接口的方法包括：利用第一显示接口在触摸显示器打开时显示多个数据对象的打开图像的触摸显示设备; 触摸所述触摸显示装置的预定显示区域; 并且所述触摸显示装置将所述第一显示界面切换到与所述第一显示界面不同的第二显示界面，用于在打开时显示所述多个数据对象的打开图像。

公开(公告)号：US20080145810A1

公开(公告)日：2008-06-19

申请号：US11609909

申请日：2006-12-13

Applicant: Chun-Lin Chen ,  Ching-Wen Tsai ,  Shih-Wei Chia

Inventor： Chun-Lin Chen ,  Ching-Wen Tsai ,  Shih-Wei Chia

IPC: F27D5/00

CPC classification number: F27B17/0025 ,  H01L21/67017 ,  H01L21/67109

Abstract: A cap cover suitable for a furnace for semiconductor process is provided. The furnace includes a plurality of injectors and a base, and the cap cover is disposed on the base of the furnace. The cap cover includes a circular plate and an outer ring. The outer ring is disposed on the outer edge of the circular plate and extends upward from a surface of the circular plate not facing the base. The outer ring has a gap, and the gap is sufficient to accommodate the injectors.

Abstract translation: 提供适用于半导体工艺炉的盖盖。 该炉包括多个喷射器和一个底座，并且盖罩设置在炉底部。 盖罩包括圆形板和外圈。 外圈设置在圆板的外边缘上，并且从圆形板的不面向基座的表面向上延伸。 外圈具有间隙，间隙足以容纳注射器。

公开(公告)号：US20060183435A1

公开(公告)日：2006-08-17

申请号：US11056602

申请日：2005-02-14

Applicant: Chun-Lin Chen

Inventor： Chun-Lin Chen

IPC: H04B1/38 ,  H04M1/00

CPC classification number: G06F1/1632

Abstract: A keyboard structure has a housing with a first cover and a second cover. A plurality of keys is provided on the first cover and used for data input. A wireless transmission module is located inside the housing for transmitting signals. A first clamping part pivoted on the second cover and a second clamping part is pivoted on the first clamping part. By means of the bluetooth technology used for data transmission and work together with a mobile phone or a PDA, data is conveniently input, and further the first clamping part and the second clamping part work together to clamp the mobile phone and the PDA so that a user may hold the device in hand to input data.

Abstract translation: 键盘结构具有带有第一盖和第二盖的外壳。 多个键设置在第一盖上并用于数据输入。 无线传输模块位于壳体内部用于传输信号。 枢转在第二盖上的第一夹紧部件和第二夹紧部件在第一夹紧部件上枢转。 通过用于数据传输的蓝牙技术，与手机或PDA一起工作，方便地输入数据，第一夹紧部分和第二夹紧部分一起工作以夹紧移动电话和PDA，使得 用户可以手持设备输入数据。

公开(公告)号：US06825177B2

公开(公告)日：2004-11-30

申请号：US10037003

申请日：2001-10-19

Applicant: Fatih Uckun ,  Chun-Lin Chen ,  Taracad K. Venkatachalam ,  Zhoa-Hai Zhu

Inventor： Fatih Uckun ,  Chun-Lin Chen ,  Taracad K. Venkatachalam ,  Zhoa-Hai Zhu

IPC: A61K3170

CPC classification number: A61K31/7064 ,  A61K31/675

Abstract: Methods for increasing the elimination half-life of key metabolites such as d4T by administering an aryl phosphate derivative of d4T having an electron withdrawing substituent on the aryl group and an amino acid substituent on the phosphate group are described. A preferred aryl phosphate derivative of d4T is HI-113 (d4T-5′-[p-bromophenyl methoxyalaninyl phosphate]). The administration of HI-113 results in more prolonged systemic exposure to the key metabolites, Ala-d4T-MP and d4T, than administration of an equimolar dose of either metabolite. Each metabolite has a significantly longer elimination half life when formed in vivo from the administration of HI-113 than when the metabolite is administered directly.

Abstract translation: 描述了通过在芳基上施用具有吸电子取代基的d4T的芳基磷酸酯衍生物和磷酸基上的氨基酸取代基来增加关键代谢物如d4T的消除半衰期的方法。 d4T的优选芳基磷酸酯衍生物是HI-113（d4T-5' - [对溴苯基甲氧基亚氨基磷酸酯]）。 与施用等摩尔剂量的代谢物相比，HI-113的施用导致对关键代谢物Ala-d4T-MP和d4T的更长时间的全身暴露。 每次代谢产物在从体内施用HI-113时的消除半衰期显着延长，而不是直接施用代谢物。

公开(公告)号：US06459151B1

公开(公告)日：2002-10-01

申请号：US09710624

申请日：2000-11-10

Applicant: Chi-Long Chung ,  Eddie Chiu ,  Chun-Lin Chen ,  Sheng-Fen Chiu

Inventor： Chi-Long Chung ,  Eddie Chiu ,  Chun-Lin Chen ,  Sheng-Fen Chiu

IPC: H01L214763

CPC classification number: H01L22/34

Abstract: A structure or a process of the via chain is employed to test the misalignment. The structure of the via chain includes a first via chain in the first direction and a second via chain in the second direction. Using the structure having the via chains in two different directions, the misalignment can be easily detected.

Abstract translation: 使用通孔链的结构或过程来测试不对准。 通孔链的结构包括在第一方向上的第一通孔链和在第二方向上的第二通孔链。 使用具有两个不同方向的通孔链的结构，可以容易地检测到未对准。

公开(公告)号：US06324097B1

公开(公告)日：2001-11-27

申请号：US09383373

申请日：1999-08-26

Applicant: Chun-Lin Chen ,  Ting-S. Wang ,  Juinn-Sheng Chen

Inventor： Chun-Lin Chen ,  Ting-S. Wang ,  Juinn-Sheng Chen

IPC: G11C1604

CPC classification number: H01L27/11521 ,  G11C2216/10 ,  H01L27/11558

Abstract: The present invention discloses a single poly non-volatile memory structure including a semiconductor substrate with two active areas divided by isolation regions. A control gate doped with N-type impurities is embedded in the first active area, and a first floating gate is formed thereon. A second floating gate is formed on the substrate of the second active area, and two doped regions are implanted at opposite sides of the second active areas in the substrate. A floating gate line is employed to connect the first and second floating gate for making sure that the two floating gates are in the same potential. When the control gate is biased to a voltage level, the voltage level would be coupled to the first floating gate so as to keep the second floating gate in the same potential with the first floating gate. While one of the doped regions is biased to a voltage level, electrons would eject from the other doped region and trapped in the floating gates, thereby preserving information in this memory structure.

Abstract translation: 本发明公开了一种单一的多元非易失性存储结构，其包括半导体衬底，两个有源区被隔离区划分。 掺杂有N型杂质的控制栅极嵌入在第一有源区中，并且在其上形成第一浮栅。 在第二有源区的衬底上形成第二浮栅，并且在衬底中的第二有源区的相对侧注入两个掺杂区。 采用浮动栅极线连接第一和第二浮栅，以确保两个浮动栅极处于相同的电位。 当控制栅极偏置到电压电平时，电压电平将耦合到第一浮置栅极，以便使第二浮置栅极与第一浮置栅极保持相同的电位。 虽然一个掺杂区域被偏置到电压电平，但电子将从另一个掺杂区域弹出并被捕获在浮动栅极中，从而保留该存储器结构中的信息。