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11.发明申请公开(公告)号：US20160329702A1
公开(公告)日：2016-11-10
申请号：US14705489
申请日：2015-05-06
Applicant: Cisco Technology, Inc.
Inventor： Yang Sun , Zhongmin Gan , Bruce Chen , Yun Bai , Nan Wang
IPC: H02H9/02
CPC classification number: H02H9/004
Abstract: An apparatus comprises an input node, a power rail to power a circuit load, and multiple current paths coupled in parallel with each other between the input node and the power rail. Each current path respectively provides a sense output to indicate current in the path and a current switch having a control input to control the current in the path. A control circuit, coupled to each control input individually and to each sense output individually, controls the current in each path individually based on the indicated current therein after a non-zero input voltage is initially applied to the input node, such that all of the paths concurrently conduct current from the input node to the power rail and collectively cause a total inrush current and corresponding voltage at the power rail to gradually increase.
Abstract translation: 一种装置包括输入节点，为电路负载供电的电力轨道以及在输入节点和电力轨道之间彼此并联耦合的多个电流路径。 每个电流路径分别提供感测输出以指示路径中的电流和具有用于控制路径中的电流的控制输入的电流开关。 控制电路单独地耦合到每个控制输入和单独的每个感测输出，在非零输入电压最初被施加到输入节点之后，基于其中指示的电流来单独地控制每个通路中的电流，使得所有的 路径同时将电流从输入节点传导到电力轨道，并共同引起总浪涌电流和电力轨道上的相应电压逐渐增加。
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公开(公告)号：US20220014100A1
公开(公告)日：2022-01-13
申请号：US16923648
申请日：2020-07-08
Applicant: Cisco Technology, Inc.
Inventor： Yang Sun , Zomin Gan , Min Wang , Yepeng Chen
Abstract: A voltage regulator dynamically adjusts the voltage distribution on a voltage rail based on multiple feedback measurements. The voltage regulator provides electrical power to a voltage rail at multiple power supply locations along the voltage rail. The voltage regulator obtains voltage measurements from multiple voltage sensing locations on the voltage rail and detects a spatially unequal voltage deviation in the voltage rail. The voltage regulator adjusts the electrical power provided to the voltage rail at each of the power supply locations to compensate for the spatially unequal voltage deviation in the voltage rail.
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Patent Agency Ranking
公开(公告)号：US11223280B1
公开(公告)日：2022-01-11
申请号：US16923648
申请日：2020-07-08
Applicant: Cisco Technology, Inc.
Inventor： Yang Sun , Zomin Gan , Min Wang , Yepeng Chen
Abstract: A voltage regulator dynamically adjusts the voltage distribution on a voltage rail based on multiple feedback measurements. The voltage regulator provides electrical power to a voltage rail at multiple power supply locations along the voltage rail. The voltage regulator obtains voltage measurements from multiple voltage sensing locations on the voltage rail and detects a spatially unequal voltage deviation in the voltage rail. The voltage regulator adjusts the electrical power provided to the voltage rail at each of the power supply locations to compensate for the spatially unequal voltage deviation in the voltage rail.
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公开(公告)号：US10559904B1
公开(公告)日：2020-02-11
申请号：US16357976
申请日：2019-03-19
Applicant: Cisco Technology, Inc.
Inventor： Le Gao , Yang Sun , Yepeng Chen
Abstract: A scalable multiprocessor computing system includes first and second computing devices and a link module connecting the computing devices. The link module includes a guide connector that aligns and couples the first computing device with the second computing device in an orientation in which a printed circuit board assembly (PCBA) support housing wall of the first computing device faces a PCBA support housing wall of the second computing device, a bracket member that is connected along corresponding lengthwise sides of the first and second computing devices, and a cable connector that provides a signal connection between the processor of the first computing device and the processor of the second computing device. The guide connector is connected to the bracket member.
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公开(公告)号：US20180121093A1
公开(公告)日：2018-05-03
申请号：US15792669
申请日：2017-10-24
Applicant: Cisco Technology, Inc.
Inventor： Yang Sun
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0656 , G06F3/0683 , G06F13/16 , G06F13/1689 , G11C5/04
Abstract: Aspects of the embodiments include systems and devices that include a memory controller circuit element, and a printed circuit board (PCB). The PCB can include a memory module element; and a data buffer circuit element, the data buffer circuit element electrically connected to the memory controller circuit element and configured to receive instructions and data from the memory controller circuit element, the data buffer circuit element electrically connected to the memory module circuit element directly or through a socket, the data buffer circuit element configured to transmit instructions and data originated from the memory controller circuit element to the memory module circuit element and transmit data back to the memory controller.
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公开(公告)号：US09917437B2
公开(公告)日：2018-03-13
申请号：US14705489
申请日：2015-05-06
Applicant: Cisco Technology, Inc.
Inventor： Yang Sun , Zhongmin Gan , Bruce Chen , Yun Bai , Nan Wang
CPC classification number: H02H9/004
Abstract: An apparatus comprises an input node, a power rail to power a circuit load, and multiple current paths coupled in parallel with each other between the input node and the power rail. Each current path respectively provides a sense output to indicate current in the path and a current switch having a control input to control the current in the path. A control circuit, coupled to each control input individually and to each sense output individually, controls the current in each path individually based on the indicated current therein after a non-zero input voltage is initially applied to the input node, such that all of the paths concurrently conduct current from the input node to the power rail and collectively cause a total inrush current and corresponding voltage at the power rail to gradually increase.
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公开(公告)号：US09811266B1
公开(公告)日：2017-11-07
申请号：US15273274
申请日：2016-09-22
Applicant: CISCO TECHNOLOGY, INC.
Inventor： Yang Sun
CPC classification number: G06F3/061 , G06F3/0656 , G06F3/0683 , G06F13/16 , G06F13/1689 , G11C5/04
Abstract: Aspects of the embodiments include systems and devices that include a memory controller circuit element, and a printed circuit board (PCB). The PCB can include a memory module element; and a data buffer circuit element, the data buffer circuit element electrically connected to the memory controller circuit element and configured to receive instructions and data from the memory controller circuit element, the data buffer circuit element electrically connected to the memory module circuit element directly or through a socket, the data buffer circuit element configured to transmit instructions and data originated from the memory controller circuit element to the memory module circuit element and transmit data back to the memory controller.
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