公开(公告)号：US20230004777A1

公开(公告)日：2023-01-05

申请号：US17857602

申请日：2022-07-05

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung Eun KIM ,  Tae Wook KANG ,  Hyuk KIM ,  Young Hwan BAE ,  Kyung Jin BYUN ,  Kwang IL OH ,  Jae-Jin LEE ,  In San JEON

IPC: G06N3/04 ,  G06N3/063

Abstract: Disclosed are a spike neural network apparatus based on a multi-encoding and an operating method thereof. The method of operating a spike neural network (SNN) apparatus that performs a multi-encoding, includes receiving an input signal by an encoding module, performing a rate coding and a temporal coding on the received input signal by the encoding module, generating an SNN input signal based on the performance result of the rate coding and the temporal coding, and transmitting the generated SNN input signal to a neuromorphic chip that performs a spike neural network (SNN) operation.

公开(公告)号：US20220109808A1

公开(公告)日：2022-04-07

申请号：US17399603

申请日：2021-08-11

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sukho LEE ,  Sang Pil KIM ,  Young Hwan BAE ,  Jae-Jin LEE ,  Kyuseung HAN ,  Tae Wook KANG ,  Sung Eun KIM ,  Hyuk KIM ,  Kyung Hwan PARK ,  Hyung-IL PARK ,  Kyung Jin BYUN ,  Kwang IL OH ,  In Gi LIM

IPC: H04N7/01 ,  H04N7/08

Abstract: Disclosed is a network-on-chip including a first data converter that receives first image data and second image data from at least one image sensor and encodes one image data among the first image data and the second image data, into first data, based on whether the first image data is identical to the second image data and a second data converter that receives non-image data from at least one non-image sensor and encodes the received non-image data into second data. The network-on-chip outputs the first data and the second data to transmit the first data and the second data to an external server at a burst length.

公开(公告)号：US20200092226A1

公开(公告)日：2020-03-19

申请号：US16556905

申请日：2019-08-30

Applicant: Electronics and Telecommunications Research Institute

Inventor： Kyuseung HAN ,  Sukho LEE ,  Jae-Jin LEE ,  Sang Pil KIM ,  Young Hwan BAE ,  Kyung Jin BYUN

IPC: H04L12/933 ,  H04L12/42

Abstract: Provided is a system-on-chip. A central controller is configured to, in response to a request from a host, generate a first signal for requesting error information related to an error from a design of an IP. A local controller is configured to generate a second signal including the error information of the target IP if the request from the host is determined to be for the target IP based on the first signal.