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    PHASE DEMODULATOR WITH NEGATIVE FEEDBACK LOOP
    1.
    发明申请
    PHASE DEMODULATOR WITH NEGATIVE FEEDBACK LOOP 有权

    公开(公告)号：US20220302909A1

    公开(公告)日：2022-09-22

    申请号：US17585009

    申请日：2022-01-26

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Jang Hong CHOI ,  Bon Tae KOO ,  Kyung Hwan PARK ,  Min PARK ,  Seon-Ho HAN

    IPC: H03K5/01 ,  H03F3/04 ,  H03D7/00 ,  H04L27/22

    Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

    CHARGE SENSITIVE AMPLIFIER AND RADIATION SENSOR INCLUDING THE SAME
    2.
    发明申请
    CHARGE SENSITIVE AMPLIFIER AND RADIATION SENSOR INCLUDING THE SAME 有权

    公开(公告)号：US20210405224A1

    公开(公告)日：2021-12-30

    申请号：US17362267

    申请日：2021-06-29

    Applicant: CHANGWON NATIONAL UNIVERSITY Industry Academy Cooperation Corps ,  Electronics and Telecommunications Research Institute

    Inventor： Young Hee KIM ,  Hong Zhou JIN ,  Kyung Hwan PARK

    IPC: G01T1/24

    Abstract: Disclosed are a charge sensitive amplifier capable of minimizing a variation in a signal voltage of an output signal by applying a bias direct current to a gate of a feedback transistor, and a radiation sensor including the same. According to the charge sensitive amplifier and the radiation sensor including the same, it is possible to minimize a variation in a signal voltage of a charge sensitive amplifier output signal by applying a current, which is formed by mirroring a current bias circuit designed to be insensitive to PVT variations, to a gate of a feedback transistor. Furthermore, it is possible to reduce a variation in charging time and enable high-speed sensing by charging the signal voltage to the level of a common voltage VCOM by using a constant current supplied through a bandgap reference (BGR) circuit.

    RECEIVER OF AN UWB RADAR DEVICE AND OPERATING METHOD THEREOF
    6.
    发明申请
    RECEIVER OF AN UWB RADAR DEVICE AND OPERATING METHOD THEREOF 有权

    公开(公告)号：US20250052860A1

    公开(公告)日：2025-02-13

    申请号：US18788357

    申请日：2024-07-30

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Young-deuk JEON ,  Yi-Gyeong KIM ,  Kyung Hwan PARK ,  Sujin PARK ,  MIN-HYUNG CHO

    IPC: G01S7/32 ,  G01S13/02 ,  G01S13/16

    Abstract: Disclosed is a receiver of a radar device, which includes a sampling circuit that receives a reflected pulse signal having a first period reflected from a detection target and samples the reflected pulse signal as a first received signal in response to a clock signal having a second period equal to the first period, an integration circuit that, in response to the clock signal, generates an analog integration signal based on the first received signal and a control signal, a comparison circuit that, in response to the clock signal, adjusts a count value and the control signal based on a result of comparing the analog integration signal with a reference signal and outputs the control signal to the integration circuit, and an ADC circuit that converts the analog integration signal into a digital integration signal.

    RADAR DEVICE OPERATING IN DUAL MODE AND OPERATION METHOD THEREOF
    8.
    发明申请
    RADAR DEVICE OPERATING IN DUAL MODE AND OPERATION METHOD THEREOF 有权

    公开(公告)号：US20220244371A1

    公开(公告)日：2022-08-04

    申请号：US17573177

    申请日：2022-01-11

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Min PARK ,  Bon Tae KOO ,  Kyung Hwan PARK ,  PIL JAE PARK ,  Jang Hong CHOI

    IPC: G01S13/58 ,  G01S13/536 ,  G01S7/35

    Abstract: Disclosed is a radar device capable of operating in a dual mode, which includes a transmitter that includes a first signal generator that generates a Doppler radar signal and a second signal generator that generates a Frequency Modulated Continuous Wave (FMCW) radar signal, a receiver that receives a reflected signal reflected from a target and converts the reflected signal to a digital signal, a signal processing circuit that processes the digital signal differently depending on the dual mode to output an output signal, a signal analysis circuit that analyzes the output signal, and a controller that controls operations of the transmitter, the receiver, the signal processing circuit, and the signal analysis circuit, and the dual mode includes a first mode in which the first signal generator is activated and a second mode in which the second signal generator is activated.

    ELECTRONIC CIRCUIT FOR IMPLEMENTING GENERATIVE ADVERSARIAL NETWORK USING SPIKE NEURAL NETWORK
    10.
    发明申请
    ELECTRONIC CIRCUIT FOR IMPLEMENTING GENERATIVE ADVERSARIAL NETWORK USING SPIKE NEURAL NETWORK 审中-公开

    公开(公告)号：US20190392291A1

    公开(公告)日：2019-12-26

    申请号：US16445925

    申请日：2019-06-19

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Seong Mo PARK ,  Jae-Jin LEE ,  Sung Eun KIM ,  Kyung Hwan PARK ,  Mi Jeong PARK ,  Young Hwan BAE ,  Kwang IL OH ,  Byounggun CHOI

    IPC: G06N3/04

    Abstract: Provided is an electronic circuit for implementing a generative adversarial neural network. The electronic circuit includes a spike converter, a spike image generator, a spike image converter, and an image discriminator. The spike converter generates a first signal including spike signals. The number of the spike signals is determined based on first data associated with second data within a reference time interval. The spike image generator generates a second signal including spike signals being selected based on a weight among the spike signals of the first signal. The image converter converts the spike signals of the second signal to generate third data being represented in an analog domain. The image discriminator provides the spike image generator with result data being associated with a difference between a value of the third data and a value of the second data. The image generator determines the weight based on the result data.

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