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公开(公告)号：US20220367339A1
公开(公告)日：2022-11-17
申请号：US17875205
申请日：2022-07-27
Applicant: General Electric Company
Inventor： Marco Francesco Aimi , Joseph Alfred Iannotti , Joleyn Eileen Brewer
Abstract: A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.
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公开(公告)号：US11430728B2
公开(公告)日：2022-08-30
申请号：US16666016
申请日：2019-10-28
Applicant: General Electric Company
Inventor： Marco Francesco Aimi , Joseph Alfred Iannotti , Joleyn Eileen Brewer
IPC: H01L23/522 , H01L49/02 , H01L21/48 , B81C1/00 , B81B7/02 , B81B7/00 , B81C3/00 , H01L21/60 , H01L23/64
Abstract: A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.
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13.发明申请公开(公告)号：US20210204397A1
公开(公告)日：2021-07-01
申请号：US16730435
申请日：2019-12-30
Applicant: General Electric Company
Abstract: An electronics package is disclosed. The electronics package includes a first radio frequency (RF) substrate layer, a second RF substrate layer, and a plurality of conductive layers disposed adjacent to at least one of the first RF substrate layer and the second RF substrate layer and including an inner conductive layer disposed between and adjacent to both the first RF substrate layer and the second RF substrate layer. The inner conductive layer bonds the first RF substrate layer to the second RF substrate layer. The electronics package also includes a plurality of conductive interconnects extending through the first RF substrate layer and the second RF substrate layer and electrically coupled between at least two of the plurality of conductive layers.
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公开(公告)号：US10784576B2
公开(公告)日：2020-09-22
申请号：US15782991
申请日：2017-10-13
Applicant: General Electric Company
Inventor： Joseph Alfred Iannotti , Christopher James Kapusta
Abstract: A beam former module includes a package base and an interconnect structure formed within the package base. The beam former module also includes a first true time delay (TTD) module attached to the package base. The first TTD module includes a plurality of switching elements configured to define a signal transmission path between a signal input and a signal output of the first TTD module by selectively activating a plurality of time delay lines. The signal input and the signal output of the first TTD module are electrically coupled to the interconnect structure. In some embodiments, the interconnect structure includes at least one TTD meander line and at least one of the time delay lines of the first TTD module is electrically coupled to the at least one TTD meander line.
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15.发明申请公开(公告)号：US20190239355A1
公开(公告)日：2019-08-01
申请号：US15883664
申请日：2018-01-30
Applicant: GENERAL ELECTRIC COMPANY
Inventor： Joseph Alfred Iannotti
Abstract: A process for fabricating a printed circuit assembly is presented. The process includes providing a first base substrate having a first surface and a second surface opposite to the first surface; providing a flexible circuit layer including a first region having a first set of signal traces and a second region having a second set of signal traces, wherein the first region and the second region are separated by a first intermediate region; disposing the first region of the flexible circuit layer on the first surface of the first base substrate; bending the flexible circuit layer at the first intermediate region to surround a thickness side of the first base substrate; and disposing the second region of the flexible circuit layer on the second surface of the first base substrate. A printed circuit assembly is also presented.
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Patent Agency Ranking
公开(公告)号：US10211902B1
公开(公告)日：2019-02-19
申请号：US15782969
申请日：2017-10-13
Applicant: General Electric Company
Inventor： Joseph Alfred Iannotti , Marco Francesco Aimi
Abstract: An antenna system includes a plurality of true time delay (TTD) modules, each having a plurality of switching elements configured to selectively define alternative RF signal transmission paths between a signal input and a signal output of the TTD module. A controller is programmed to control the plurality of TTD modules to steer a beam according to a make-before-break switching technique by closing a first pair of switching elements within at least a subset of the plurality of TTD modules to activate a first RF signal transmission path; closing a second pair of switching elements of the subset of the plurality of TTD modules to activate a second RF signal transmission path in parallel with the first RF transmission path; and opening the first pair of switching elements of the subset of TTD modules after closing the second pair of switching elements.
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公开(公告)号：US20180219286A1
公开(公告)日：2018-08-02
申请号：US15421915
申请日：2017-02-01
Applicant: General Electric Company
Inventor： Yongjae Lee , Joseph Alfred Iannotti , Steven YueHin Go
IPC: H01Q3/26
Abstract: A true time delay (TTD) module includes a substrate and a transmission line formed on the substrate. The transmission line includes time delay lines that define signal paths of varying lengths between a signal input and a signal output of the TTD module. A plurality of switching elements are positioned along the transmission line and are selectively controllable to define a signal transmission path between the signal input and the signal output. The switching elements include an input switching element positioned at a first end of each of the plurality of time delay lines, an output switching element positioned at a second end of each of the plurality of time delay lines, and at least one intermediate switching element positioned between the input switching element and the output switching element of at least one of the plurality of time delay lines.
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公开(公告)号：US09954263B2
公开(公告)日：2018-04-24
申请号：US14839464
申请日：2015-08-28
Applicant: General Electric Company
Inventor： Yongjae Lee , Joseph Alfred Iannotti , Christopher Fred Keimel , Christopher James Kapusta
CPC classification number: H01P1/127 , B81B7/007 , H01H49/00 , H01H59/0009 , H01P11/00
Abstract: A radio frequency (RF) microelectromechanical system (MEMS) package includes a first mounting substrate, a signal line formed on a top surface of the first mounting substrate, the signal line comprising a MEMS device selectively electrically coupling a first portion of the signal line to a second portion of the signal line, and a ground assembly coupled to the first mounting substrate. The ground assembly includes a second mounting substrate, a ground plane formed on a bottom surface of the second mounting substrate, and at least one electrical interconnect extending through a thickness of the second mounting substrate to contact the ground plane, wherein the ground plane is spaced apart from the signal line.
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公开(公告)号：US20170350253A1
公开(公告)日：2017-12-07
申请号：US15171359
申请日：2016-06-02
Applicant: General Electric Company
Inventor： Douglas Scott Jacobs , Aaron Jay Knobloch , Robert Edward Goeller , Mudassar Ali Muhammad , Joseph Alfred Iannotti
CPC classification number: F01D5/02 , F02C3/04 , F05D2220/32 , F05D2240/60 , F05D2260/80 , G01L3/045 , G01L3/108
Abstract: A gas turbine engine and system for measuring torque for a gas turbine engine shaft is provided. The system may include a first sensor module, a second sensor module, a first coupler, a second coupler, and a static antenna. The first and second sensor modules may include strain sensors positioned on the gas turbine engine shaft. The first coupler may be positioned on the gas turbine engine shaft and electrically connected with the first sensor module. The second coupler may be positioned on the gas turbine engine shaft and electrically connected with the second sensor module. The static antenna may include a first band and a second band. The first signal band may be in operable communication with the first sensor module and positioned radially outward from the first coupler. The second signal band may be in operable communication with the second sensor module and positioned radially outward from the second coupler.
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公开(公告)号：US09552502B1
公开(公告)日：2017-01-24
申请号：US14820736
申请日：2015-08-07
Applicant: General Electric Company
Inventor： Joseph Alfred Iannotti , William Chester Platt , Trang Thuy Thai
Abstract: A calibration circuit includes a single-wire memory and a transmission line. The single-wire memory includes a power/interrogation terminal and a ground terminal. The single-wire memory is configured to store calibration data for a sensor. The transmission line is configured to be coupled between the sensor and a sensor reader. The transmission line includes first and second conductors. The first conductor is coupled to the power/interrogation terminal and is configured to provide the calibration data and a sensor output signal to the sensor reader. The second conductor is coupled to the ground terminal and is configured to provide a ground reference for the first conductor, the single-wire memory, and the sensor.
Abstract translation: 校准电路包括单线存储器和传输线。 单线存储器包括电源/询问端子和接地端子。 单线存储器配置为存储传感器的校准数据。 传输线被配置为耦合在传感器和传感器读取器之间。 传输线包括第一和第二导体。 第一导体耦合到电源/询问终端，并被配置为向传感器读取器提供校准数据和传感器输出信号。 第二导体耦合到接地端子并且被配置为为第一导体，单线存储器和传感器提供接地参考。
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