公开(公告)号：US20190324723A1

公开(公告)日：2019-10-24

申请号：US16457318

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Nitin N. Garegrat ,  Maciej Urbanski ,  Michael Rotzin ,  Brian J. Hickmann ,  Valentina Popescu

IPC: G06F7/487 ,  G06F7/523 ,  G06F17/16 ,  G06F7/544

Abstract: Systems, apparatuses and methods may provide for technology that in response to an identification that one or more hardware units are to execute on a first type of data format, decomposes a first original floating point number to a plurality of first segmented floating point numbers that are to be equivalent to the first original floating point number. The technology may further in response to the identification, decompose a second original floating point number to a plurality of second segmented floating point numbers that are to be equivalent to the second original floating point number. The technology may further execute a multiplication operation on the first and second segmented floating point numbers to multiply the first segmented floating point numbers with the second segmented floating point numbers.