-
公开(公告)号：US10069397B2
公开(公告)日：2018-09-04
申请号：US14757802
申请日：2015-12-23
Applicant: Intel Corporation
Inventor： Vaibhav Vaidya , Pavan Kumar , Krishnan Ravichandran , Vivek K. De
Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry. The switch controller circuitry includes dead time logic circuitry to determine an estimated dead time interval between a turn off of a first switch and a turn on of a second switch. The first switch and the second switch are coupled at a switched node. The estimated dead time interval is determined based, at least in part, on a difference between an input voltage, Vin, and a switched voltage, Vsw, detected at the switched node just prior to turning off the first switch, a parasitic capacitance, Cpar, associated with the switched node and a maximum inductor current, IL,max. The difference between Vin and Vsw represents the maximum inductor current.
-
公开(公告)号：US20170187284A1
公开(公告)日：2017-06-29
申请号：US14757802
申请日：2015-12-23
Applicant: Intel Corporation
Inventor： Vaibhav Vaidya , Pavan Kumar , Krishnan Ravichandran , Vivek K. De
IPC: H02M3/158
CPC classification number: H02M1/083 , H02M1/38 , H02M3/1588 , Y02B70/1466
Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry. The switch controller circuitry includes dead time logic circuitry to determine an estimated dead time interval between a turn off of a first switch and a turn on of a second switch. The first switch and the second switch are coupled at a switched node. The estimated dead time interval is determined based, at least in part, on a difference between an input voltage, Vin, and a switched voltage, Vsw, detected at the switched node just prior to turning off the first switch, a parasitic capacitance, Cpar, associated with the switched node and a maximum inductor current, IL,max. The difference between Vin and Vsw represents the maximum inductor current.
-
Search Results
12
records
(took 0.013 seconds)
