公开(公告)号：US20210143825A1

公开(公告)日：2021-05-13

申请号：US16676869

申请日：2019-11-07

Applicant: Infineon Technologies AG

Inventor： Grigory ITKIN

IPC: H03L7/23 ,  H03L7/07 ,  H03L7/08 ,  H03L7/087 ,  H03L7/099 ,  G01S13/40

Abstract: A signal generator includes a first phase-locked loop (PLL) configured to receive a first reference signal having a first reference frequency and generate a ramping signal based on the first reference signal, where the ramping signal is between a minimum frequency and a maximum frequency of a radar frequency band; a system clock configured to generate a second reference signal having a common system reference frequency; and a second PLL configured to receive the second reference signal from the system clock, generate the first reference signal based on the second reference signal, and provide the first reference signal to the first PLL.