公开(公告)号：US20220070522A1

公开(公告)日：2022-03-03

申请号：US17523502

申请日：2021-11-10

Applicant: Intel Corporation

Inventor： Lakshminarayana Pappu ,  Nausheen Ansari ,  Howard Heck ,  Amit Kumar Srivastava

IPC: H04N21/43 ,  H04N21/422 ,  G06F13/38

Abstract: Embodiments relate to a controller subsystem that includes a virtual reality (VR) subsystem to: identify data received from a peripheral device as related to an audio/visual (A/V) function of the peripheral device; direct, based on the identification that the data is related to the A/V function of the peripheral device, the data to be stored in a memory subsystem of the controller subsystem; and facilitate transmission of an indication of a storage location of the data in the memory subsystem to a host system that is communicatively coupled with the controller subsystem. The controller subsystem further includes a graphics engine to: identify, in a message received from the host system based on the transmission of the indication of the storage location of the data, instructions related to rendering the data; and generate, based on the data received from the peripheral device, rendered data. Other embodiments may be described and claimed.

公开(公告)号：US10108227B2

公开(公告)日：2018-10-23

申请号：US14998067

申请日：2015-12-24

Applicant: INTEL CORPORATION

Inventor： Khang Choong Yong ,  Shu Young Cheah ,  Wil Choon Song ,  Jackson Chung Peng Kong ,  Howard Heck

IPC: H01R24/00 ,  G06F1/16 ,  H01R12/70 ,  H01R12/71 ,  H05K1/11 ,  A41D1/00 ,  H01R4/58

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to provide a interface component including a housing comprising a first shell portion and a second shell portion, the first shell portion forming an extended portion for the housing and comprising a retention track engageable a counterpart retention track. The interface component to include a printed circuit board disposed within the housing, the printed circuit board comprising a plurality of contact pins each comprising a contact hole and a retention bump and a socket to couple with a stud.

公开(公告)号：US09215113B1

公开(公告)日：2015-12-15

申请号：US14491484

申请日：2014-09-19

Applicant: INTEL CORPORATION

Inventor： Huimin Chen ,  Howard Heck ,  Hsiao-Ping J. Tsai

IPC: H03H7/30 ,  H03H7/40 ,  H03K5/159 ,  H04L25/03

CPC classification number: H04L25/03885 ,  G06F13/385 ,  H04L25/03343 ,  H04L25/4902

Abstract: Techniques for training a link are described herein. An example electronic device includes a port coupled to a link partner. The port and the link partner use closed-loop equalizer training to obtain receiver equalization coefficients for the receiver of the port and obtain transmitter equalization coefficients for the transmitter of the link partner.

Abstract translation: 本文描述了用于训练链接的技术。 示例性电子设备包括耦合到链路伙伴的端口。 端口和链路伙伴使用闭环均衡器训练来获得端口接收机的接收机均衡系数，并获得链路伙伴发射机的发射机均衡系数。