公开(公告)号：US07282990B2

公开(公告)日：2007-10-16

申请号：US11375952

申请日：2006-03-15

申请人： Sung-Pil Choi ,  Do-Youn Kim ,  Jae-Wook Kwon

发明人： Sung-Pil Choi ,  Do-Youn Kim ,  Jae-Wook Kwon

IPC分类号： G06G7/12

CPC分类号： H03K5/2481 ,  H03F3/45183 ,  H03F2203/45674

摘要： An operational amplifier includes: a differential amplifier for differentially amplifying first and second differential input signals to generate first and second output signals through first and second nodes; a driver for driving an output node in response to the second output signal; and a drive current adjuster for adjusting a driving current of the driver in response to the first output signal. The drive current adjuster includes: a first transistor including a drain connected to the output node, a gate, and a source connected to a ground voltage; a second transistor including a gate connected to the first node, a drain, and a source connected to a source voltage; a third transistor including a drain connected to the drain of the second transistor, a source, and a gate connected to a first bias voltage; and a fourth transistor including a drain connected to the source of the third transistor, a source connected to the ground voltage, and a gate connected to a second bias voltage, wherein the gate of the first transistor is commonly connected to the drains of the second and third transistors.

摘要翻译： 运算放大器包括：差分放大器，用于差分放大第一和第二差分输入信号，以通过第一和第二节点产生第一和第二输出信号; 用于响应于所述第二输出信号驱动输出节点的驱动器; 以及驱动电流调节器，用于响应于第一输出信号调整驱动器的驱动电流。 驱动电流调节器包括：第一晶体管，包括连接到输出节点的漏极，栅极和连接到接地电压的源极; 第二晶体管，包括连接到第一节点的栅极，漏极和连接到源极电压的源极; 第三晶体管，包括连接到第二晶体管的漏极的漏极，源极和连接到第一偏置电压的栅极; 以及第四晶体管，包括连接到第三晶体管的源极的漏极，连接到接地电压的源极和连接到第二偏置电压的栅极，其中第一晶体管的栅极共同连接到第二晶体管的漏极 和第三晶体管。

公开(公告)号：US20060238238A1

公开(公告)日：2006-10-26

申请号：US11375952

申请日：2006-03-15

申请人： Sung-Pil Choi ,  Do-Youn Kim ,  Jae-Wook Kwon

发明人： Sung-Pil Choi ,  Do-Youn Kim ,  Jae-Wook Kwon

IPC分类号： H03K5/22 ,  G06G7/12

CPC分类号： H03K5/2481 ,  H03F3/45183 ,  H03F2203/45674

摘要： An operational amplifier includes: a differential amplifier for differentially amplifying first and second differential input signals to generate first and second output signals through first and second nodes; a driver for driving an output node in response to the second output signal; and a drive current adjuster for adjusting a driving current of the driver in response to the first output signal. The drive current adjuster includes: a first transistor including a drain connected to the output node, a gate, and a source connected to a ground voltage; a second transistor including a gate connected to the first node, a drain, and a source connected to a source voltage; a third transistor including a drain connected to the drain of the second transistor, a source, and a gate connected to a first bias voltage; and a fourth transistor including a drain connected to the source of the third transistor, a source connected to the ground voltage, and a gate connected to a second bias voltage, wherein the gate of the first transistor is commonly connected to the drains of the second and third transistors.

摘要翻译： 运算放大器包括：差分放大器，用于差分放大第一和第二差分输入信号，以通过第一和第二节点产生第一和第二输出信号; 用于响应于所述第二输出信号驱动输出节点的驱动器; 以及驱动电流调节器，用于响应于第一输出信号调整驱动器的驱动电流。 驱动电流调节器包括：第一晶体管，包括连接到输出节点的漏极，栅极和连接到接地电压的源极; 第二晶体管，包括连接到第一节点的栅极，漏极和连接到源极电压的源极; 第三晶体管，包括连接到第二晶体管的漏极的漏极，源极和连接到第一偏置电压的栅极; 以及第四晶体管，包括连接到第三晶体管的源极的漏极，连接到接地电压的源极和连接到第二偏置电压的栅极，其中第一晶体管的栅极共同连接到第二晶体管的漏极 和第三晶体管。