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公开(公告)号:US20240331632A1
公开(公告)日:2024-10-03
申请号:US18614807
申请日:2024-03-25
Applicant: Japan Display Inc.
Inventor: Kenji HARADA , Hideyuki TAKAHASHI , Tetsuo MORITA , Masahiro KUBOTA
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0842 , G09G2310/08
Abstract: To effectively inhibit corrosion of a connecting terminal in an EL display, an array substrate includes a plurality of light emitting elements that are regularly arrayed, a scanning circuit that supplies the plurality of light emitting elements with at least a first scanning signal and a second scanning signal, and a plurality of connection terminals that are connected to the scanning circuit by a plurality of connection lines. The plurality of connection terminals include two adjacent connection terminals, an inverting circuit is interposed in at least one of two connection lines that connect the two adjacent connection terminals with the scanning circuit, and a same logic period in which output signals or input signals of the two adjacent connection terminals both have high potential or low potential in one scanning period is longer than a different logic period, in one scanning period.
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公开(公告)号:US20240161698A1
公开(公告)日:2024-05-16
申请号:US18500178
申请日:2023-11-02
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/0426 , G09G2300/0861 , G09G2310/0286 , G09G2330/021
Abstract: A display device includes a first transistor controlled using a second control signal obtained by shifting a first control signal and electrically connected between an image data signal line and a first node, a second transistor electrically connected between the first node and a second node, a third transistor controlled using the first control signal and electrically connected between the second node and a gate electrode of the second transistor, a fourth transistor controlled using a fourth control signal obtained by shifting a third control signal and electrically connected between a driving power supply line and the second node, a fifth transistor controlled using the third control signal and electrically connected to the first node, a sixth transistor controlled using the third control signal and electrically connected to a light emitting element and a first electrode of the fifth transistor, and the light emitting element connected to the first electrode.
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公开(公告)号:US20240119893A1
公开(公告)日:2024-04-11
申请号:US18480528
申请日:2023-10-04
Applicant: Japan Display Inc.
Inventor: Kenji HARADA , Tetsuo MORITA
IPC: G09G3/3225
CPC classification number: G09G3/3225 , G09G2300/0861 , G09G2310/0286 , G09G2310/08 , G09G2320/0233
Abstract: According to one embodiment, a display device includes a pixel circuit provided in each of a plurality of pixels, a plurality of flip-flop circuits provided in a shift register and a reset element provided in each of the flip-flop circuits, and the reset element is an n-channel type transistor, the pixel circuit includes a light emitting element, a light emitting power supply and a switch element, and the light emitting element is disconnected from the light emitting power supply while the light emitting power supply is rising.
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公开(公告)号:US20230074191A1
公开(公告)日:2023-03-09
申请号:US17985957
申请日:2022-11-14
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Hiroyuki KIMURA , Makoto SHIBUSAWA , Hiroshi TABATAKE , Yasuhiro OGAWA
IPC: H01L27/12 , H01L27/13 , H01L29/786 , G02F1/1362
Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.
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公开(公告)号:US20220352269A1
公开(公告)日:2022-11-03
申请号:US17657955
申请日:2022-04-05
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Sho YANAGISAWA , Kenji HARADA , Hiroshi TABATAKE , Hideyuki TAKAHASHI
Abstract: According to one embodiment, a display device comprising a base, a first insulating layer, a first lower electrode, a second lower electrode, a first wiring, a second insulating layer disposed on the first wiring, a first organic layer disposed on the first lower electrode, a second organic layer disposed on the second lower electrode, a first separation wall disposed on the second insulating layer, and an upper wiring disposed continuously on the first organic layer, the second organic layer, and the first separation wall, wherein the upper wiring is electrically connected to the first wiring via a contact hole that penetrates the first separation wall and the second insulating layer.
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公开(公告)号:US20220319412A1
公开(公告)日:2022-10-06
申请号:US17656265
申请日:2022-03-24
Applicant: Japan Display Inc.
Inventor: Hiroshi TABATAKE , Tetsuo MORITA
IPC: G09G3/3225 , H01L27/32
Abstract: According to one embodiment, a display device includes a base, a plurality of pixels, a power supply line and a power supply line drive circuit. The pixels each include a pixel circuit, a display element including a lower electrode, an upper electrode and an organic layer including a light-emitting layer. The upper electrode is connected to the power supply line that provides a predetermined potential to the upper electrode. The power supply line drive circuit supplies, to the power supply line, a first potential to the upper electrode during a light-emitting period and supplies, to the power supply line, a second potential to the upper electrode during a non-light-emitting period.
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公开(公告)号:US20220181429A1
公开(公告)日:2022-06-09
申请号:US17676312
申请日:2022-02-21
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA
IPC: H01L27/32 , G09G3/3266 , H01L51/52
Abstract: A display device includes: a plurality of pixel electrodes; a plurality of pixel circuits below the plurality of pixel electrodes; some scan lines, each of the scan lines being connected to a corresponding one group of the plurality of pixel circuits; and a scan drive circuit configured to selectively send scanning signals to the scan lines. The plurality of pixel electrodes include effective pixel electrodes corresponding to respective pixels constituting a displayed image, and dummy pixel electrodes between the effective pixel electrodes and the scan drive circuit and corresponding to none of the respective pixels. Each of the effective pixel electrodes is connected to a corresponding one of the plurality of pixel circuits. Each of the scan lines is electrically connected to the scan drive circuit through a corresponding at least one of the dummy pixel electrodes.
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公开(公告)号:US20220059026A1
公开(公告)日:2022-02-24
申请号:US17520959
申请日:2021-11-08
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Yasuhiro OGAWA
IPC: G09G3/32 , G09G3/20 , H01L25/075
Abstract: According to one embodiment, a display device includes a display region where pixels are arranged. Each of the pixels includes a pixel electrode, a light emitting element, a drive transistor, a first capacitance electrode layer opposed to the pixel electrode and held at a constant potential, and an insulating layer forming an auxiliary capacitance together with the pixel electrode and the first capacitance electrode layer. A value of the auxiliary capacitance of the first pixel, of the values of the auxiliary capacitance of the pixels is the largest.
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公开(公告)号:US20210110763A1
公开(公告)日:2021-04-15
申请号:US17109242
申请日:2020-12-02
Applicant: Japan Display Inc.
Inventor: Tetsuo MORITA , Yasuhiro OGAWA
IPC: G09G3/32 , H01L25/075
Abstract: According to one embodiment, a display device includes a display area and a driver. Each of pixels includes a light emitting element and a drive transistor connected in series. An image signal includes a first luminance data and a second luminance data. The first luminance data is based on an average value of a gradation value of pixels, and is common among the pixels included in said one area. The second luminance data is, based on a difference between the gradation value and the average value, an independent luminance data of each of the pixels. The driver controls a common luminance time of the pixels based on the first luminance data, and controls a current value to be supplied to the luminance element of each of the pixels based on the second luminance data.
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公开(公告)号:US20210090492A1
公开(公告)日:2021-03-25
申请号:US17113175
申请日:2020-12-07
Applicant: Japan Display Inc
Inventor: Tetsuo MORITA , Yasuhiro OGAWA
IPC: G09G3/32 , G09G3/20 , H01L25/075
Abstract: According to one embodiment, a display device includes a display region where pixels are arranged. Each of the pixels includes a pixel electrode, a light emitting element, a drive transistor, a first capacitance electrode layer opposed to the pixel electrode and held at a constant potential, and an insulating layer forming an auxiliary capacitance together with the pixel electrode and the first capacitance electrode layer. A value of the auxiliary capacitance of the first pixel, of the values of the auxiliary capacitance of the pixels is the largest.
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