公开(公告)号：US20140306947A1

公开(公告)日：2014-10-16

申请号：US14250487

申请日：2014-04-11

Applicant: Japan Display Inc.

Inventor： Motoharu MIYAMOTO ,  Takahiro OCHIAI ,  Hideo SATO

IPC: H03K17/16

CPC classification number: H03K17/162 ,  H03K17/16

Abstract: A gate signal line drive circuit and a display using the circuit, which suppress a leak current to reduce a power consumption. A gate signal line drive circuit that supplies a high voltage in a signal high period, and supplies a low voltage in a signal low period, the gate signal line drive circuit including: a high voltage supply switching element that turns on in response to the high period, supplies a voltage of a first basic clock signal to gate signal lines; a high voltage supply off control circuit that supplies a first low voltage to a switch of the high voltage supply switching element in response to the signal low period; and a low voltage supply switching circuit that supplies a second low voltage higher than the first low voltage to the gate signal lines in response to the signal low period.

Abstract translation: 门信号线驱动电路和使用该电路的显示器，其抑制泄漏电流以降低功耗。 一种栅极信号线驱动电路，其在信号高周期中提供高电压，并且在信号低电平周期中提供低电压，所述栅极信号线驱动电路包括：高电压电源开关元件，其响应于高电平而导通 向栅极信号线提供第一基本时钟信号的电压; 高压电源断开控制电路，其响应于所述信号低周期而向所述高压电源开关元件的开关提供第一低电压; 以及低电压电源开关电路，其响应于所述信号低周期而将高于所述第一低电压的第二低电压提供给所述栅极信号线。