公开(公告)号：US06512705B1

公开(公告)日：2003-01-28

申请号：US09989964

申请日：2001-11-21

Applicant: Jeff Koelling ,  John Schreck ,  Jon Morris ,  Rishad Omer

Inventor： Jeff Koelling ,  John Schreck ,  Jon Morris ,  Rishad Omer

IPC: G11C700

CPC classification number: G11C8/08 ,  G11C11/4085 ,  G11C2207/2227

Abstract: A word line driver circuit for a semiconductor memory device. One or more transistors in the driver circuit are fabricated such that they are susceptible, under certain conditions, to gate-induced diode leakage (GIDL). One terminal of the transistors are coupled to a local supply node, which during standby conditions when the word line driver circuit is not driving a word line, is maintained at a voltage less than that of a global power supply node. In one embodiment, the local power supply node is coupled to the global power supply node by means of at least one decoupling transistor receiving a control signal at its gate and by a vt-connected transistor, such that the voltage on the local power supply node is maintained at a level not exceeding one transistor threshold voltage less than the global power supply node voltage when the decoupling transistor is off. When the decoupling transistor(s) is/are switched on prior to word line driving operation, the voltage on the local power supply node rises to the voltage of the global power supply node. Preferably, the control signal(s) controlling the decoupling transistor(s) are, or are derived from, control signals generated for purposes other than controlling the decoupling transistor.

Abstract translation: 一种用于半导体存储器件的字线驱动电路。 驱动电路中的一个或多个晶体管被制造成使得它们在某些条件下易受到栅极引起的二极管泄漏（GIDL）的影响。 晶体管的一个端子耦合到本地电源节点，当在字线驱动器电路未驱动字线的待机状态下，该端子被保持在比全局电源节点的电压小的电压。 在一个实施例中，本地电源节点通过至少一个解耦晶体管耦合到全局电源节点，该去耦晶体管在其栅极处接收控制信号，并由vt连接的晶体管接收，使得本地电源节点 当去耦晶体管断开时，其维持在不超过一个晶体管阈值电压的电平，小于全局电源节点电压。 当在字线驱动操作之前，去耦晶体管被接通时，局部电源节点上的电压上升到全局电源节点的电压。 优选地，控制去耦晶体管的控制信号或者是从除了控制去耦晶体管之外的目的产生的控制信号导出的。