公开(公告)号：US5142536A

公开(公告)日：1992-08-25

申请号：US584608

申请日：1990-09-19

申请人： Yasushi Akao ,  Shinkichi Hotta ,  Haruo Keida

发明人： Yasushi Akao ,  Shinkichi Hotta ,  Haruo Keida

IPC分类号： G06F11/22 ,  G06F11/267 ,  G06F15/78

CPC分类号： G06F11/2236 ,  G06F15/7814

摘要： In a single chip microcomputer, functional blocks such as the central processing unit (CPU), the ROM for storing programs, the RAM for storing the data and the I/O circuit for the input and the output of the data and the like are formed on one semiconductor substrate. Address data is used for selecting predetermined areas of the functional blocks in the internal bus to which the address data must be supplied by the CPU. A buffer circuit is capable of being supplied with address data from the external devices and is provided in the microcomputer. When the functional blocks are tested, address data is directly supplied to the functional blocks from the external tester without using the instruction execution of the CPU, and necessary data is outputted from the area of the predetermined functional block, passing through the buffer circuit and is read out directly to the external devices. Hence, the testing efficiency is improved.