公开(公告)号：US11665920B2

公开(公告)日：2023-05-30

申请号：US17094174

申请日：2020-11-10

Applicant: LG Display Co., Ltd.

Inventor： Soyi Lee ,  Changsoo Kim ,  Euitae Kim ,  Kiseob Shin

IPC: H01L29/08 ,  H01L51/52 ,  H01L27/32

CPC classification number: H01L51/5228 ,  H01L27/3246 ,  H01L27/3276 ,  H01L51/5234 ,  H01L2251/308 ,  H01L2251/5323

Abstract: A transparent display panel has an auxiliary electrode region including a partition wall whose a width of a top face is larger than that of a bottom face thereof. The auxiliary electrode region is disposed on a line region within a display region. A second electrode of an organic light-emitting element and a VSS voltage connection line is electrically connected to each other via an auxiliary electrode, such that electrical resistance of the second electrode as a transparent electrode is reduced. Further, the auxiliary electrode region is formed on each of a plurality of line regions respectively including VSS voltage connection lines extending across the display region. Thus, a current is fed to each pixel in the display region in a smooth manner, such that luminance distribution across the panel is uniform.

公开(公告)号：US11552162B2

公开(公告)日：2023-01-10

申请号：US17108533

申请日：2020-12-01

Applicant: LG Display Co., Ltd.

Inventor： Kiseob Shin ,  Namwook Cho ,  Changsoo Kim ,  Euitae Kim ,  Soyi Lee

IPC: H01L27/32 ,  H01L51/52

Abstract: In a transparent display panel, a layer of each of a VSS voltage connection line and a VDD voltage connection line as a power line in a display region is different from a layer of a data line and a reference voltage connection line, while each of the VSS voltage connection line and the VDD voltage connection line partially overlaps the data line and the reference voltage connection line. Thus, an overall width of a line region may be reduced. Thus, an area of a pixel circuit region is reduced, such that an area of a transmissive region increases, thereby to increase an overall transmittance of the panel. Further, a width of each of the VSS voltage connection line and the VDD voltage connection line is large while reducing or minimizing an area of the line region in the display region. This reduces or minimizes occurrence of VDD drop or VSS rise, thereby to reduce luminance non-uniformity of the panel.