公开(公告)号：US11536688B2

公开(公告)日：2022-12-27

申请号：US16808276

申请日：2020-03-03

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

公开(公告)号：US10605767B2

公开(公告)日：2020-03-31

申请号：US14971173

申请日：2015-12-16

Applicant: LIFE TECHNOLOGIES CORPORATION

Inventor： Keith G. Fife ,  Jungwook Yang

IPC: G01N27/414 ,  G06F30/392 ,  G06F30/394

Abstract: A high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. Reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. In a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. Also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.