Semiconductor device providing an output in response to a read command or a mode-register read command

    公开(公告)号:US10515683B2

    公开(公告)日:2019-12-24

    申请号:US15882607

    申请日:2018-01-29

    Abstract: Disclosed herein is an apparatus that includes a first circuit that activates first and second timing signals in response to a first command and activates the second timing signal in response to a second command, a second circuit that amplifies a first data read out from a first memory area in response to the first command in synchronization with the first timing signal, and a third circuit that outputs one of the first data output from the second circuit and a second data read out from a second memory area in response to the second command, in synchronization with the second timing signal.

    SEMICONDUCTOR DEVICE HAVING MODE REGISTER
    12.
    发明申请

    公开(公告)号:US20190237126A1

    公开(公告)日:2019-08-01

    申请号:US15882607

    申请日:2018-01-29

    Abstract: Disclosed herein is an apparatus that includes a first circuit that activates first and second timing signals in response to a first command und activates the second timing signal in response to a second command, a second circuit that amplifies a first data read out from a first memory area in response to the first command in synchronization with the first timing signal, and a third circuit that outputs one of the first data output from the second circuit and a second data read out from a second memory area in response to the second command, in synchronization with the second timing signal.

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