公开(公告)号：US07668027B2

公开(公告)日：2010-02-23

申请号：US11365492

申请日：2006-03-02

申请人： Kengo Imagawa ,  Masami Makuuchi ,  Ritsuro Orihashi ,  Yoshiharu Ikeda ,  Koichiro Eguchi

发明人： Kengo Imagawa ,  Masami Makuuchi ,  Ritsuro Orihashi ,  Yoshiharu Ikeda ,  Koichiro Eguchi

IPC分类号： G11C11/00

CPC分类号： G11C29/50 ,  G11C29/50012

摘要： In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.

摘要翻译： 为了容易地对包括在半导体器件中的存储器接口执行定时测试以满足对等待时间的限制，本发明提供一种具有存储器接口的半导体器件，包括：时钟输出端子，其输出与 连接到存储器接口的存储器的操作; 命令终端，其输出与所述存储器的状态的控制相关联的命令信号; 与存储器交换数据信号的数据终端; 以及数据选通端子，用于交换用于建立数据信号的数据选通信号。 该半导体器件包括测试端子，其预先输出用于在命令信号之外的存储器接口上开始测试的信号。

公开(公告)号：US20070047345A1

公开(公告)日：2007-03-01

申请号：US11365492

申请日：2006-03-02

申请人： Kengo Imagawa ,  Masami Makuuchi ,  Ritsuro Orihashi ,  Yoshiharu Ikeda ,  Koichiro Eguchi

发明人： Kengo Imagawa ,  Masami Makuuchi ,  Ritsuro Orihashi ,  Yoshiharu Ikeda ,  Koichiro Eguchi

IPC分类号： G11C29/00

CPC分类号： G11C29/50 ,  G11C29/50012

摘要： In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.

摘要翻译： 为了容易地对包括在半导体器件中的存储器接口执行定时测试以满足对等待时间的限制，本发明提供一种具有存储器接口的半导体器件，包括：时钟输出端子，其输出与 连接到存储器接口的存储器的操作; 命令终端，其输出与所述存储器的状态的控制相关联的命令信号; 与存储器交换数据信号的数据终端; 以及数据选通端子，用于交换用于建立数据信号的数据选通信号。 该半导体器件包括测试端子，其预先输出用于在命令信号之外的存储器接口上开始测试的信号。