-
公开(公告)号:US11367160B2
公开(公告)日:2022-06-21
申请号:US16053341
申请日:2018-08-02
Applicant: NVIDIA Corporation
Inventor: Rajballav Dash , Gregory Palmer , Gentaro Hirota , Lacky Shah , Jack Choquette , Emmett Kilgariff , Sriharsha Niverty , Milton Lei , Shirish Gadre , Omkar Paranjape , Lei Yang , Rouslan Dimitrov
Abstract: A parallel processing unit (e.g., a GPU), in some examples, includes a hardware scheduler and hardware arbiter that launch graphics and compute work for simultaneous execution on a SIMD/SIMT processing unit. Each processing unit (e.g., a streaming multiprocessor) of the parallel processing unit operates in a graphics-greedy mode or a compute-greedy mode at respective times. The hardware arbiter, in response to a result of a comparison of at least one monitored performance or utilization metric to a user-configured threshold, can selectively cause the processing unit to run one or more compute work items from a compute queue when the processing unit is operating in the graphics-greedy mode, and cause the processing unit to run one or more graphics work items from a graphics queue when the processing unit is operating in the compute-greedy mode. Associated methods and systems are also described.