公开(公告)号：US12081812B2

公开(公告)日：2024-09-03

申请号：US18328854

申请日：2023-06-05

Applicant: NVIDIA Corporation

Inventor： Rouslan Dimitrov ,  Viktor Grigoryevich Vandanov ,  Sau Yan Keith Li ,  James Howard ,  Scott Phillip Cutler

IPC: H04N21/238 ,  H04N21/24

CPC classification number: H04N21/23805 ,  H04N21/2401

Abstract: A performance metrics of a receiver is obtained using frames of an application hosted by a server that are received via a network. The one or more performance metrics include information indicative of a current occupancy of a frame buffer corresponding to the receiver and information indicative of a target occupancy of the frame buffer corresponding to the receiver. The frame buffer of the receiver is used to queue frames of the application for display. A frame rate associated with rendering at least one next frame of the application is adjusted using the one or more performance metrics of the receiver to control population of the frame buffer. Subsequent frames of the application hosted by the server are rendered using the adjusted frame rate. Upon rendering the subsequent frames, the server sends the subsequent frames to the receiver for display.

公开(公告)号：US20230328302A1

公开(公告)日：2023-10-12

申请号：US18328854

申请日：2023-06-05

Applicant: NVIDIA Corporation

Inventor： Rouslan Dimitrov ,  Viktor Grigoryevich Vandanov ,  Sau Yan Keith Li ,  James Howard ,  Scott Phillip Cutler

IPC: H04N21/238 ,  H04N21/24

CPC classification number: H04N21/23805 ,  H04N21/2401

Abstract: A performance metrics of a receiver is obtained using frames of an application hosted by a server that are received via a network. The one or more performance metrics include information indicative of a current occupancy of a frame buffer corresponding to the receiver and information indicative of a target occupancy of the frame buffer corresponding to the receiver. The frame buffer of the receiver is used to queue frames of the application for display. A frame rate associated with rendering at least one next frame of the application is adjusted using the one or more performance metrics of the receiver to control population of the frame buffer. Subsequent frames of the application hosted by the server are rendered using the adjusted frame rate. Upon rendering the subsequent frames, the server sends the subsequent frames to the receiver for display.

公开(公告)号：US11722671B2

公开(公告)日：2023-08-08

申请号：US17235307

申请日：2021-04-20

Applicant: Nvidia Corporation

Inventor： Rouslan Dimitrov ,  Chris Amsinck ,  Viktor Vandanov ,  Santanu Dutta ,  Walter Donovan ,  Olivier Lapicque

IPC: G06F9/48 ,  H04L67/10 ,  H04N19/127 ,  H04N19/194 ,  H04N19/182 ,  H04N19/164 ,  H04N19/85 ,  H04N19/186

CPC classification number: H04N19/127 ,  G06F9/4856 ,  H04N19/164 ,  H04N19/182 ,  H04N19/194 ,  H04N19/85 ,  H04L67/10 ,  H04N19/186

Abstract: The present disclosure is directed to a method and system for increasing virtual machine (VM) density on a server system through adaptive rendering by dynamically shifting video rendering tasks to a client computing device. In one embodiment, a processor in a server manages virtual machines in the server by controlling a number of VMs and an amount of system resources allocated to the VMs. The number of VMs and the amount of resources allocated to the VMs are controlled by shifting video rendering from at least one of the VMs to a client device, and increasing the number of the VMs in the server after the shifting.

公开(公告)号：US11367160B2

公开(公告)日：2022-06-21

申请号：US16053341

申请日：2018-08-02

Applicant: NVIDIA Corporation

Inventor： Rajballav Dash ,  Gregory Palmer ,  Gentaro Hirota ,  Lacky Shah ,  Jack Choquette ,  Emmett Kilgariff ,  Sriharsha Niverty ,  Milton Lei ,  Shirish Gadre ,  Omkar Paranjape ,  Lei Yang ,  Rouslan Dimitrov

IPC: G06T1/20 ,  G06F9/38 ,  G06F15/80

Abstract: A parallel processing unit (e.g., a GPU), in some examples, includes a hardware scheduler and hardware arbiter that launch graphics and compute work for simultaneous execution on a SIMD/SIMT processing unit. Each processing unit (e.g., a streaming multiprocessor) of the parallel processing unit operates in a graphics-greedy mode or a compute-greedy mode at respective times. The hardware arbiter, in response to a result of a comparison of at least one monitored performance or utilization metric to a user-configured threshold, can selectively cause the processing unit to run one or more compute work items from a compute queue when the processing unit is operating in the graphics-greedy mode, and cause the processing unit to run one or more graphics work items from a graphics queue when the processing unit is operating in the compute-greedy mode. Associated methods and systems are also described.

公开(公告)号：US10741143B2

公开(公告)日：2020-08-11

申请号：US16166880

申请日：2018-10-22

Applicant: NVIDIA Corporation

Inventor： Rouslan Dimitrov

IPC: G09G5/00 ,  G06T3/00 ,  G02B27/01 ,  A63F13/355 ,  A63F13/358 ,  G06T5/00

Abstract: Systems and techniques for streaming video with dynamic jitter tolerance are described. In one example, a system includes a server executing an application and generating image frames associated with the application at a frame rate, and a client which displays the image frames on a display that has a predetermined refresh rate and which monitors arrival times of the image frames in relation to the predetermined refresh rate. The server is further configured to dynamically change the frame rate based on the monitoring so that the frame rate more closely corresponds to the predetermined refresh rate of the client's display.

公开(公告)号：US09792122B2

公开(公告)日：2017-10-17

申请号：US14046856

申请日：2013-10-04

Applicant: NVIDIA CORPORATION

Inventor： Ziyad S. Hakura ,  Walter R. Steiner ,  Cynthia Ann Edgeworth Allison ,  Rouslan Dimitrov ,  Karim M. Abdalla ,  Dale L. Kirkland ,  Emmett M. Kilgariff

IPC: G06F9/38 ,  G06T15/80 ,  G06F9/44 ,  G06F12/08 ,  G06T15/50 ,  G09G5/395 ,  G09G5/00 ,  G06T15/40 ,  G06T1/20 ,  G06T1/60 ,  G06T15/00 ,  G06F12/0808 ,  G06F12/0875

CPC classification number: G06T1/20 ,  G06F9/38 ,  G06F9/44 ,  G06F12/0808 ,  G06F12/0875 ,  G06F2212/302 ,  G06T1/60 ,  G06T15/005 ,  G06T15/405 ,  G06T15/503 ,  G06T15/80 ,  G06T17/20 ,  G09G5/003 ,  G09G5/395 ,  Y02D10/13

Abstract: One embodiment of the present invention includes a technique for processing graphics primitives in a tile-based architecture. The technique includes storing, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles received from the world-space pipeline. The technique further includes determining, based on a first condition, that the first plurality of graphics primitives should be replayed from the buffer, and, in response, replaying the first plurality of graphics primitives against a first tile included in a first plurality of tiles. Replaying the first plurality of graphics primitives includes comparing each graphics primitive against the first tile to determine whether the graphics primitive intersects the first tile, determining that one or more graphics primitives intersects the first tile, and transmitting the one or more graphics primitives and one or more associated state bundles to a screen-space pipeline for processing.

公开(公告)号：US12056854B2

公开(公告)日：2024-08-06

申请号：US17706473

申请日：2022-03-28

Applicant: NVIDIA Corporation

Inventor： Thomas Albert Petersen ,  Ankan Banerjee ,  Shishir Goyal ,  Sau Yan Keith Li ,  Lars Nordskog ,  Rouslan Dimitrov

IPC: G06T5/70 ,  G06F9/38 ,  G06T1/20 ,  G06T13/00 ,  G06T13/20 ,  G06T15/00 ,  G09G5/00

CPC classification number: G06T5/70 ,  G06F9/3877 ,  G06T1/20 ,  G06T13/00 ,  G06T13/20 ,  G06T15/005 ,  G09G5/00

Abstract: Embodiments of the present invention provide end-to-end frame time synchronization designed to improve smoothness for displaying images of 3D applications, such as PC gaming applications. Traditionally, an application that renders 3D graphics functions based on the assumption that the average render time will be used as the animation time for a given frame. When this condition is not met, and the render time for a frame does not match the average render time of prior frames, the frames are not captured or displayed at a consistent rate. This invention enables feedback to be provided to the rendering application for adjusting the animation times used to produce new frames, and a post-render queue is used to store completed frames for mitigating stutter and hitches. Flip control is used to sync the display of a rendered frame with the animation time used to generate the frame, thereby producing a smooth, consistent image.

公开(公告)号：US20240202860A1

公开(公告)日：2024-06-20

申请号：US18594099

申请日：2024-03-04

Applicant: NVIDIA Corporation

Inventor： Sau Yan Keith Li ,  Seth Schneider ,  Cody Robson ,  Lars Nordskog ,  Charles Hansen ,  Rouslan Dimitrov

IPC: G06T1/20 ,  G06F9/38 ,  G06F9/48

CPC classification number: G06T1/20 ,  G06F9/3836 ,  G06F9/4881

Abstract: A weighted average execution time associated with each execution stage of a plurality of execution stages used to process a plurality of frames in parallel is obtained. The processing of each of the plurality of frames is performed at each of the plurality of execution stages in a sequential order, starting with an initial execution stage and continuing with each subsequent execution stage. A first largest weighted average execution time associated with one of the plurality of execution stages is determined. A delay to the initial execution stage prior to processing a first next frame is applied. The delay is determined based on the first largest weighted average execution time.

公开(公告)号：US11700402B1

公开(公告)日：2023-07-11

申请号：US17704732

申请日：2022-03-25

Applicant: NVIDIA Corporation

Inventor： Rouslan Dimitrov ,  Viktor Grigoryevich Vandanov ,  Sau Yan Keith Li ,  James Howard ,  Scott Phillip Cutler

IPC: H04N21/238 ,  H04N21/24

CPC classification number: H04N21/23805 ,  H04N21/2401

Abstract: A performance metrics of a receiver is obtained using frames of an application hosted by a server that are received via a network. The one or more performance metrics include information indicative of a current occupancy of a frame buffer corresponding to the receiver and information indicative of a target occupancy of the frame buffer corresponding to the receiver. The frame buffer of the receiver is used to queue frames of the application for display. A frame rate associated with rendering at least one next frame of the application is adjusted using the one or more performance metrics of the receiver to control population of the frame buffer. Subsequent frames of the application hosted by the server are rendered using the adjusted frame rate. Upon rendering the subsequent frames, the server sends the subsequent frames to the receiver for display.

公开(公告)号：US11012694B2

公开(公告)日：2021-05-18

申请号：US15967645

申请日：2018-05-01

Applicant: Nvidia Corporation

Inventor： Rouslan Dimitrov ,  Chris Amsinck ,  Viktor Vandanov ,  Santanu Dutta ,  Walter Donovan ,  Olivier Lapicque

IPC: H04N19/127 ,  H04N19/194 ,  H04L29/08 ,  H04N19/182

Abstract: The present disclosure is directed to a method to increase virtual machine density on a server system through adaptive rendering by dynamically determining when to shift video rendering tasks between the server system and a client computing device. In another embodiment, the adaptive rendering, using various parameters, can select one or more encoding and compression algorithms to use to prepare and process the video for transmission to the client computing device. In another embodiment, a video rendering system is disclosed that can adaptively alter how and where a video is rendered, encoded, and compressed.