公开(公告)号：US20210134647A1

公开(公告)日：2021-05-06

申请号：US16674399

申请日：2019-11-05

Applicant: NXP B.V.

Inventor： Antonius Hendrikus Jozef Kamphuis ,  Guido Albermann ,  Johannes Cobussen

IPC: H01L21/683 ,  H01L21/673

Abstract: A technique for handling an integrated circuit/tape assembly having a plurality of integrated circuits supported by underlying dicing tape involves placing the integrated circuit/tape assembly on a bottom file frame carrier (FFC) frame having structure (e.g., an inner rim or flexible pegs), placing a top FFC frame having a central opening over the integrated circuit/tape assembly, and mating the top and bottom FFC frames such that the dicing tape is pulled over the structure thereby laterally stretching the dicing tape, which breaks wafer saw bows holding the integrated circuits together. The lateral stretching of the dicing tape increases distance between adjacent integrated circuits in at least two mutually orthogonal lateral directions, thereby inhibiting the adjacent integrated circuits from colliding during shipment or storage for subsequent processing. The resulting assembly can be thinner than conventional FFC configurations, which results in more efficient shipment and storage.