Abstract:
A synapse array based on a static random access memory (SRAM), a pulse shaper circuit, and a neuromorphic system are provided. The synapse array includes a plurality of synapse circuits. At least one synapse circuit among the plurality of synapse circuits includes at least one bias transistor and at least two cut-off transistors, and the at least one synapse circuit is configured to charge a membrane node of a neuron circuit connected with the at least one synapse circuit using a sub-threshold leakage current that passed through the at least one bias transistor.
Abstract:
Disclosed are a method and an apparatus for detecting spike event or transmitting spike event information generated in a neuromorphic chip. The apparatus for detecting spike event generated in a neuromorphic chip may detect spike event information for a plurality of neurons included in the neuromorphic chip based on a neuron group.