公开(公告)号：US09723326B2

公开(公告)日：2017-08-01

申请号：US14619993

申请日：2015-02-11

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazuma Sakakibara ,  Kiyofumi Abe ,  Naoki Yoshimatsu ,  Hideyuki Ohgose ,  Koji Arimura ,  Hiroshi Arakawa ,  Kazuhito Kimura

IPC: H04N19/61 ,  H04N19/593

CPC classification number: H04N19/103 ,  H04N19/124 ,  H04N19/593 ,  H04N19/61

Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block, and in the intra prediction, (i) selection of the lower-left reference mode is prohibited and intra prediction is performed on the second processing block, and, (ii) intra prediction is performed on the first processing block.

公开(公告)号：US10038901B2

公开(公告)日：2018-07-31

申请号：US15631755

申请日：2017-06-23

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazuma Sakakibara ,  Kiyofumi Abe ,  Naoki Yoshimatsu ,  Hideyuki Ohgose ,  Koji Arimura ,  Hiroshi Arakawa ,  Kazuhito Kimura

IPC: H04N19/61 ,  H04N19/103 ,  H04N19/124 ,  H04N19/593

CPC classification number: H04N19/103 ,  H04N19/124 ,  H04N19/593 ,  H04N19/61

Abstract: An image encoding method includes: selecting, for each processing block, one of intra prediction modes specified by a coding standard, and performing intra prediction according to the intra prediction mode, wherein the intra prediction modes include a lower-left reference mode in which a processing block located at lower left of a current processing block is referred to, the processing blocks include a first processing block and a second processing block located at upper right of the first processing block, the second processing block being equal in size to the first processing block, the coding standard defines that information on the second processing block is written into a bitstream after information on the first processing block.