公开(公告)号：US10262803B1

公开(公告)日：2019-04-16

申请号：US15728120

申请日：2017-10-09

申请人： Presidio Components, Inc.

发明人： Hung Van Trinh ,  Alan Devoe

IPC分类号： H01G4/35 ,  H01G4/30 ,  H01G4/005 ,  H01G4/012

摘要： A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.