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公开(公告)号：US20190043669A1
公开(公告)日：2019-02-07
申请号：US16156708
申请日：2018-10-10
Applicant: Presidio Components. Inc.
Inventor： Hung Van Trinh , Alan Devoe , Lambert Devoe
Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.
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公开(公告)号：US10163573B1
公开(公告)日：2018-12-25
申请号：US14934404
申请日：2015-11-06
Applicant: Presidio Components. Inc.
Inventor： Alan Devoe
IPC: H01G2/00 , H01G5/019 , H01G5/06 , H01G4/228 , H01G9/10 , H05K5/03 , H01G4/38 , H01G2/14 , H01G5/017 , H01G13/00 , H01G4/04
Abstract: A capacitor assembly includes a capacitor having ends. A terminal covers less than an area of one end. A wire bond has opposing ends with one end being coupled to the terminal and is configured to break connection with a circuit when an electrical current through the wire bond reaches a fusing current. An energy storage module includes at least two capacitor assemblies. The wire bond of one capacitor is electrically connected to the second terminal of an adjacent capacitor. An energy storage assembly includes two energy storage modules stacked one on top of the other. A pulse forming network includes conductors and at least two energy storage modules. A method of making a module includes charging each of the capacitors, removing each capacitor that fails, connecting one end of a wire bond to one terminal and connecting the other end to an adjacent capacitor or to a conductor.
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公开(公告)号：US20180294102A1
公开(公告)日：2018-10-11
申请号：US15942987
申请日：2018-04-02
Applicant: Presidio Components. Inc.
Inventor： Hung Van Trinh , Alan Devoe , Lambert Devoe
Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is wholly enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.
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公开(公告)号：US11443898B2
公开(公告)日：2022-09-13
申请号：US16156708
申请日：2018-10-10
Applicant: Presidio Components. Inc.
Inventor： Hung Van Trinh , Alan Devoe , Lambert Devoe
Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.
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Patent Agency Ranking
公开(公告)号：US10741330B1
公开(公告)日：2020-08-11
申请号：US16372991
申请日：2019-04-02
Applicant: Presidio Components. Inc.
Inventor： Hung Van Trinh , Alan Devoe
Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.
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公开(公告)号：US12136522B2
公开(公告)日：2024-11-05
申请号：US17818205
申请日：2022-08-08
Applicant: Presidio Components. Inc.
Inventor： Hung Van Trinh , Alan Devoe , Lambert Devoe
Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.
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公开(公告)号：US20220384115A1
公开(公告)日：2022-12-01
申请号：US17818205
申请日：2022-08-08
Applicant: Presidio Components, Inc.
Inventor： Hung Van Trinh , Alan Devoe , Lambert Devoe
Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.
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公开(公告)号：US11462361B1
公开(公告)日：2022-10-04
申请号：US15645117
申请日：2017-07-10
Applicant: Presidio Components, Inc.
Inventor： Alan Devoe
Abstract: A capacitor assembly includes a capacitor having ends. A terminal covers less than an area of one end. A wire bond has opposing ends with one end being coupled to the terminal and is configured to break connection with a circuit when an electrical current through the wire bond reaches a fusing current. An energy storage module includes at least two capacitor assemblies. The wire bond of one capacitor is electrically connected to the second terminal of an adjacent capacitor. An energy storage assembly includes two energy storage modules stacked one on top of the other. A pulse forming network includes conductors and at least two energy storage modules. A method of making a module includes charging each of the capacitors, removing each capacitor that fails, connecting one end of a wire bond to one terminal and connecting the other end to an adjacent capacitor or to a conductor.
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公开(公告)号：US10262803B1
公开(公告)日：2019-04-16
申请号：US15728120
申请日：2017-10-09
Applicant: Presidio Components, Inc.
Inventor： Hung Van Trinh , Alan Devoe
Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.
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