公开(公告)号：US20150379663A1

公开(公告)日：2015-12-31

申请号：US14316275

申请日：2014-06-26

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan Gruber ,  Tao Wang ,  Chunhui Mei ,  Gang Zhong ,  Feng Ge

IPC: G06T1/20

CPC classification number: G06T1/20 ,  G06T11/40 ,  G06T15/005 ,  G09G5/363 ,  G09G2340/0407 ,  G09G2360/122

Abstract: In an example, a method for rendering graphics data includes rendering pixels of a first bin of a plurality of bins, wherein the pixels of the first bin are associated with a first portion of an image, and rendering, to the first bin, one or more pixels that are located outside the first portion of the image and associated with a second, different bin of the plurality of bins. The method also includes rendering the one or more pixels associated with the second bin to the second bin, such that the one or more pixels are rendered to both the first bin and the second bin.

Abstract translation: 在一个示例中，用于渲染图形数据的方法包括渲染多个箱的第一仓的像素，其中第一仓的像素与图像的第一部分相关联，并且向第一仓中呈现一个或 更多的像素位于图像的第一部分之外并且与多个箱的第二不同仓相关联。 该方法还包括将与第二仓相关联的一个或多个像素渲染到第二仓，使得一个或多个像素被渲染到第一仓和第二仓。

公开(公告)号：US20140210819A1

公开(公告)日：2014-07-31

申请号：US13754005

申请日：2013-01-30

Applicant: QUALCOMM INCORPORATED

Inventor： Chunhui Mei ,  Nariman Moezzi Madani ,  Vineet Goel ,  Usame Ceylan ,  Guofang Jiao

IPC: G06T17/20

CPC classification number: G06T17/20 ,  G06T15/005

Abstract: Systems and methods for a tessellation are described. For tessellation, a tessellation unit may divide a domain into a plurality of portions, where at least one portion is a contiguous portion. The tessellation unit may output domain coordinates of primitives along diagonal strips within the contiguous portion to increase the likelihood that patch coordinates that correspond to the domain coordinates are stored in a reuse buffer.

Abstract translation: 描述了细分的系统和方法。 为了细分，镶嵌单元可以将域划分成多个部分，其中至少一个部分是连续部分。 细分单元可以输出连续部分内沿着对角条纹的基元的域坐标，以增加对应于域坐标的修补坐标被存储在重用缓冲器中的可能性。

公开(公告)号：US20190228723A1

公开(公告)日：2019-07-25

申请号：US15880099

申请日：2018-01-25

Applicant: QUALCOMM Incorporated

Inventor： Chunhui Mei

IPC: G09G3/36 ,  G06T1/60 ,  G06T11/00 ,  G06F12/0862

Abstract: A device for graphics processing includes a memory and at least one processor. The at least one processor is configured to generate image data for an image, fetch, for each two-dimensional matrix of multiple two-dimensional matrices of units of the image, a respective portion of the image data, and process each two-dimensional matrix of the multiple two-dimensional matrices based on the respective portion of the image data to generate pixel data for the image. To process each two-dimensional matrix of the multiple two-dimensional matrices, the at least one processor is configured to process multiple units arranged in a first two-dimensional matrix of the multiple two-dimensional matrices and process, after processing the multiple units arranged in the first two-dimensional matrix, multiple units arranged in a second two-dimensional matrix of the multiple two-dimensional matrices.

公开(公告)号：US09679347B2

公开(公告)日：2017-06-13

申请号：US14182976

申请日：2014-02-18

Applicant: QUALCOMM Incorporated

Inventor： Chunhui Mei ,  Vineet Goel ,  Donghyun Kim

IPC: G06T1/00 ,  G06T1/60 ,  G06T15/80 ,  G06T1/20

CPC classification number: G06T1/60 ,  G06T1/20 ,  G06T15/005 ,  G06T15/80

Abstract: A graphics processing unit (GPU) may allocate a shared data channel in on-chip graphics memory of the GPU that is shared by at least two stages of a graphics processing pipeline. Shader units in the GPU may execute the at least two stages of the graphics processing pipeline. The GPU may store, in the shared data channel in on-chip graphics memory, data produced by each of the at least two stages of the graphics processing pipeline executing on the shader units.

公开(公告)号：US20150294498A1

公开(公告)日：2015-10-15

申请号：US14686696

申请日：2015-04-14

Applicant: QUALCOMM Incorporated

Inventor： Chunhui Mei ,  Tao Wang ,  Young In Yeo ,  Vineet Goel

IPC: G06T15/80 ,  G06T7/00 ,  G06T1/60 ,  G06T17/10 ,  G06T1/20

CPC classification number: G06T7/70 ,  G06T1/20 ,  G06T1/60 ,  G06T13/80 ,  G06T15/005 ,  G06T15/80 ,  G06T2210/12

Abstract: Techniques are described for stochastic rasterization. A graphics processing unit (GPU) may discard samples of bounding polygons that together indicate movement of one or more primitives before a pixel shader process the samples. The GPU may leverage a stencil buffer and stencil test for discarding of such samples.

Abstract translation: 技术描述为随机光栅化。 图形处理单元（GPU）可以丢弃在像素着色器处理样本之前一起指示一个或多个图元的移动的边界多边形的样本。 GPU可以利用模板缓冲区和模板测试来丢弃这样的样本。